Patents by Inventor Sheldon R. Dealy

Sheldon R. Dealy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6801625
    Abstract: The disclosed parity stripping technique quickly and efficiently converts a multi-byte input stream having parity bits to an output data stream that contains the same data as the input stream but without the parity bits. The multi-byte input stream is indexed according to the number of times a loop is completed. During each iteration of the loop, a portion of the input steam having an associated parity bit, such as a byte of the input stream, has its parity bit set to zero and the portion of the input key is then shifted a number of bits equal to the number of times the loop has been completed. The shifted value is then logically ORed with the portion of the memory used to hold the output data stream.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: October 5, 2004
    Assignee: Intel Corporation
    Inventor: Sheldon R. Dealy