Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure includes a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. One well layer is disposed between every two barrier layers. The barrier layer is made of AlxInyGa1-x-yN (0<x<1, 0<y<1, 0<x+y<1) while the well layer is made of InzGa1-zN (0<z<1). Thereby quaternary composition is adjusted for lattice match between the barrier layers and the well layers. Thus crystal defect caused by lattice mismatch is improved.

Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from AlxGa1-xN (0<x<1) while the stress control layer is made from AlxInyGa1-x-yN (0<x<1, 0<y<1, 0<x+y<1). The light emitting layer has a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. There is one well layer disposed between the two barrier layers. Thereby the stress control layer not only improves crystal quality degradation caused by lattice mismatch between the p-type carrier blocking layer and the light emitting layer but also reduces effects of compressive stress on the well layer caused by material differences.

Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure includes a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. One well layer is disposed between every two barrier layers. The barrier layer is made of AlxInyGa1-x-yN (0<x<1, 0<y<1, 0<x+y<1) while the well layer is made of InzGa1-zN (0<z<1). Thereby quaternary composition is adjusted for lattice match between the barrier layers and the well layers. Thus crystal defect caused by lattice mismatch is improved.

Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from AlxGa1?xN (0<x<1) while the stress control layer is made from AlxInyGa1?x?yN (0<x<1, 0<y<1, 0<x+y<1). The light emitting layer has a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. There is one well layer disposed between the two barrier layers. Thereby the stress control layer not only improves crystal quality degradation caused by lattice mismatch between the p-type carrier blocking layer and the light emitting layer but also reduces effects of compressive stress on the well layer caused by material differences.

Abstract: A light emitting structure includes an N-type semiconductor layer, a P-type semiconductor layer, a light emitting layer, and a stress regulation layer. The light emitting layer is formed between the N-type semiconductor layer and the P-type semiconductor layer. The stress regulation layer is formed between the N-type semiconductor layer and the light emitting layer. The stress regulation layer comprises a plurality of pairs of AlxIn(1-x)GaN and AlyIn(1-y)GaN layers stacked with each other, wherein 0<x<1, 0?y<1, thickness of the stress regulation layer is between 50 nanometer and 500 nanometer, and x?y.

Abstract: A multiple quantum well structure including a plurality of well-barrier pairs arranged along a direction is provided. Each of the well-barrier pairs includes a barrier layer and a well layer adjacent to the barrier layer. The barrier layers and the well layers of the well-barrier pairs are disposed alternately. A ratio of a thickness of the well layer in the direction to a thickness of the barrier layer in the direction in each well-barrier pair is a well-barrier thickness ratio, and the well-barrier thickness ratios of a part of the well-barrier pairs gradually increase along the direction.

Abstract: A light emitting diode device includes an epitaxial substrate, at least one passivation structure, at least one void, a semiconductor layer, a first type doping semiconductor layer, a light-emitting layer and a second type doping semiconductor layer. The passivation structure is disposed on the epitaxial substrate and has an outer surface. The void is located at the passivation structure and at least covering 50% of the outer surface of the passivation structure. The semiconductor layer is disposed on the epitaxial substrate and encapsulating the passivation structure and the void. The first type doping semiconductor layer is disposed on the semiconductor layer. The light-emitting layer is disposed on the first type doping semiconductor layer. The second type doping semiconductor layer is disposed on the light emitting layer.

Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure includes a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. One well layer is disposed between every two barrier layers. The barrier layer is made of AlxInyGa1-x-yN (0<x<1, 0<y<1, 0<x+y<1) while the well layer is made of InzGa1-zN (0<z<1). Thereby quaternary composition is adjusted for lattice match between the barrier layers and the well layers. Thus crystal defect caused by lattice mismatch is improved.

Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from AlxGa1?xN (0<x<1) while the stress control layer is made from AlxInyGa1?x?yN (0<x<1, 0<y<1, 0<x+y<1). The light emitting layer has a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. There is one well layer disposed between the two barrier layers. Thereby the stress control layer not only improves crystal quality degradation caused by lattice mismatch between the p-type carrier blocking layer and the light emitting layer but also reduces effects of compressive stress on the well layer caused by material differences.

Abstract: A light emitting diode device includes an epitaxial substrate, at least one passivation structure, at least one void, a semiconductor layer, a first type doping semiconductor layer, a light-emitting layer and a second type doping semiconductor layer. The passivation structure is disposed on the epitaxial substrate and has an outer surface. The void is located at the passivation structure and at least covering 50% of the outer surface of the passivation structure. The semiconductor layer is disposed on the epitaxial substrate and encapsulating the passivation structure and the void. The first type doping semiconductor layer is disposed on the semiconductor layer. The light-emitting layer is disposed on the first type doping semiconductor layer. The second type doping semiconductor layer is disposed on the light emitting layer.

Abstract: A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer. The first type doped semiconductor layer is disposed on the epitaxy substrate, while the light-emitting layer is disposed between the first type and second type doped semiconductor layers. The first bonding pad is disposed in the through hole and electrically connected to the first type doped semiconductor layer, while the second bonding pad is disposed on the second type doped semiconductor layer.

Abstract: A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.

Abstract: A solder composition for reacting with aluminum is provided. The main alloying components in the solder includes tin (Sn), zinc (Zn) and chromium (Cr) with 0.01 wt % to 20 wt % zinc and 0.01 wt % to 20 wt % chromium.

Abstract: A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.

Abstract: A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer. The first type doped semiconductor layer is disposed on the epitaxy substrate, while the light-emitting layer is disposed between the first type and second type doped semiconductor layers. The first bonding pad is disposed in the through hole and electrically connected to the first type doped semiconductor layer, while the second bonding pad is disposed on the second type doped semiconductor layer.

Abstract: A flip-chip gold bump structure and a method of fabricating thereof are disclosed. The structure includes a nickel layer formed on a gold bump formed on a chip, and a copper layer formed on the nickel layer for forming a Ni/Cu barrier layer. Because of the formation of the Ni/Cu layer which prevents the interaction of the gold bump and the solder, the fragile connecting point resulting from the rapid interaction of the Au—Sn can be eliminated.

Abstract: A solder composition adapted to bond metallic materials and non-metallic materials is provided. The solder composition can enhance the bonding strength for the metallic materials and the non-metallic materials. The solder composition mainly comprises Sn—Cr alloy. The solder composition further includes anther metal component for regulating the bonding capability so that the solder composition can be used to bond various materials.

Abstract: A flip-chip gold bump structure and a method of fabricating thereof are disclosed. The structure includes a nickel layer formed on a gold bump formed on a chip, and a copper layer formed on the nickel layer for forming a Ni/Cu barrier layer. Because of the formation of the Ni/Cu layer which prevents the interaction of the gold bump and the solder, the fragile connecting point resulting from the rapid interaction of the Au—Sn can be eliminated.

Abstract: In a process of fabricating flip chip interconnection, a UBM layer is deposited on an I/O pad of a chip. The UBM layer includes a nickel layer. On the UBM layer is formed a tin-containing solder material. The chip is mounted on a carrier substrate by alignment of the bonding pad with a contact pad of the carrier substrate. A reflow process is performed to respectively turn the tin-containing solder material to a tin-containing solder bump and form a composite intermetallic compound on the nickel layer of the UBM to prevent its spalling.

Abstract: In a process of fabricating flip chip interconnection, a UBM layer is deposited on an I/O pad of a chip. The UBM layer includes a nickel layer. On the UBM layer is formed a tin-containing solder material. The chip is mounted on a carrier substrate by alignment of the bonding pad with a contact pad of the carrier substrate. A reflow process is performed to respectively turn the tin-containing solder material to a tin-containing solder bump and form a composite intermetallic compound on the nickel layer of the UBM to prevent its spalling.