Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for programming data into flash memory. The method includes: generating a front-end parameter set, a mid-end parameter set and a back-end parameter set for each data-programming transaction; transmitting the front-end parameter set of each data-programming transaction to a routing engine, thereby enabling the routing engine to drive a host interface (I/F) to obtain from the host side; transmitting the mid-end parameter set of each data-programming transaction to an accelerator, thereby enabling the accelerator to drive the RAID engine to encrypt raw data or generate parity-page data according to multiple pages of the raw data; and transmitting the back-end parameter set of each data-programming transaction to the accelerator, thereby enabling the accelerator to drive a data access engine to program source data into a designated physical address of a flash module.

Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for accessing to encoding-history information. The method includes: providing a super-block formed by storage space of flash units, where the super-block includes zones, each zone includes super-page strings, and each super-page string includes pages across the flash units; and programming encoding-history information into a metadata section of a designated first page of a designated super-page string, thereby enabling a damaged page that is occurred in the designated super-page string of the designated zone to be recovered according to the encoding-history information. The encoding-history information includes a history profile and history entries. The history profile indicates which zone or zones are covered in the super-block, and a quantity of the history entries.

Abstract: The invention relates to a method and an apparatus for programming data into flash memory. The method includes: obtaining, by the accelerator, an execution table indicating that data related to the first virtual carrier need to go through a mid-end and a back-end processing stages earlier than data related to other virtual carriers; driving, by the routing engine, a host interface (I/F) to obtain data associated with all cargos in the second virtual carrier, updating the second cargo flags with third cargo flags to indicate that data associated with all the cargos in the second virtual carrier are prepared in the front-end processing stage; and determining, by the accelerator, that data associated with any cargo in the first virtual carrier hasn't been prepared according to information of the first cargo flags, and disallowing the second virtual carrier to proceed to the following processing stages.

Abstract: The invention relates to a method, and an apparatus for programming data into flash memory. The method includes: driving, by the routing engine, a host interface (I/F) according to the front-end parameter set when determining that a front-end processing stage needs to be activated for the data-programming transaction; driving, by the accelerator, a Redundant Array of Independent Disks (RAID) engine according to the mid-end parameter set when receiving an activation message of the data-programming transaction from the routing engine and determining that a mid-end processing stage needs to be activated; and driving, by the accelerator, a data access engine according to the back-end parameter set when determining that the mid-end processing stage for the data-write transaction does not need to be activated or the mid-end processing stage for the data-write transaction has been completed, and a back-end processing stage for the data-write transaction needs to be activated.

Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for data access in response to a host discard command. The method includes: allocating space in a random access memory (RAM) for an expanded discard table; receiving the host discard command from a host side; appending new entries each including one first logical address to the expanded discard table; and setting a start-address register and/or an end-address register in a performance engine for redefining an address range in the RAM that stores the expanded discard table, thereby enabling the performance engine to search the expanded discard table in the address range in the RAM for determining whether a specific logical address of user data is no longer used.

Abstract: The invention is related to an apparatus and a method for driving redundant array of independent disks (RAID) engine. The method, performed by a RAID controller in a RAID pre-processor, including: completing a driving operation for performing a series of physical-layer signal interactions with a RAID engine according to a driving value in the configuration register. The driving value corresponds to a command issued by a processing unit. The processing unit performs an operation irrelevant from an encoding or a decoding of a parity of a page group in parallel of the driving operation by the RAID controller in coordination with the RAID engine.

Abstract: A memory controller coupled to a memory device and a host device and configured to control access operations of the memory device includes a buffer memory, a host interface, a microprocessor and a data protection engine. The host interface is coupled to the host device and configured to write data received from the host device into the buffer memory and issue a buffer memory write complete notification after the data has been written in the buffer memory. The microprocessor is configured to trigger a data protection operation in response to the buffer memory write complete notification. The protection engine is configured to perform the data protection operation to generate corresponding protection information according to the data written in the buffer memory. The microprocessor is configured to directly trigger the data protection operation after confirming that the data has been written in the buffer memory.

Abstract: The invention relates to a method and an apparatus for programming data into flash memory. The method includes: obtaining, by the accelerator, an execution table indicating that data related to the first virtual carrier need to go through a mid-end and a back-end processing stages earlier than data related to other virtual carriers; driving, by the routing engine, a host interface (I/F) to obtain data associated with all cargos in the second virtual carrier, updating the second cargo flags with third cargo flags to indicate that data associated with all the cargos in the second virtual carrier are prepared in the front-end processing stage; and determining, by the accelerator, that data associated with any cargo in the first virtual carrier hasn’t been prepared according to information of the first cargo flags, and disallowing the second virtual carrier to proceed to the following processing stages.

Abstract: The invention relates to a method, and an apparatus for programming data into flash memory. The method includes: driving, by the routing engine, a host interface (I/F) according to the front-end parameter set when determining that a front-end processing stage needs to be activated for the data-programming transaction; driving, by the accelerator, a Redundant Array of Independent Disks (RAID) engine according to the mid-end parameter set when receiving an activation message of the data-programming transaction from the routing engine and determining that a mid-end processing stage needs to be activated; and driving, by the accelerator, a data access engine according to the back-end parameter set when determining that the mid-end processing stage for the data-write transaction does not need to be activated or the mid-end processing stage for the data-write transaction has been completed, and a back-end processing stage for the data-write transaction needs to be activated.

Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for programming data into flash memory. The method includes: generating a front-end parameter set, a mid-end parameter set and a back-end parameter set for each data-programming transaction; transmitting the front-end parameter set of each data-programming transaction to a routing engine, thereby enabling the routing engine to drive a host interface (I/F) to obtain from the host side; transmitting the mid-end parameter set of each data-programming transaction to an accelerator, thereby enabling the accelerator to drive the RAID engine to encrypt raw data or generate parity-page data according to multiple pages of the raw data; and transmitting the back-end parameter set of each data-programming transaction to the accelerator, thereby enabling the accelerator to drive a data access engine to program source data into a designated physical address of a flash module.

Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for accessing to encoding-history information. The method includes: providing a super-block formed by storage space of flash units, where the super-block includes zones, each zone includes super-page strings, and each super-page string includes pages across the flash units; and programming encoding-history information into a metadata section of a designated first page of a designated super-page string, thereby enabling a damaged page that is occurred in the designated super-page string of the designated zone to be recovered according to the encoding-history information. The encoding-history information includes a history profile and history entries. The history profile indicates which zone or zones are covered in the super-block, and a quantity of the history entries.

Abstract: The invention relates to a method, and an apparatus for programming data into flash memory. The method includes: reading operating settings of a virtual carrier; setting a redundant array of independent disks (RAID) engine for driving the RAID engine to complete a designated encryption or encoding operation on first data associated with the virtual carrier when the operation settings indicate that the first data associated with the virtual carrier need to go through a mid-end processing stage; and sending a programming index to a data access engine for driving the data access engine to read a programming table from the SRAM, and program the second data associated with the virtual carrier into a designated address in a flash module when the operation settings indicate that the second data associated with the virtual carrier need to go through the back-end processing stage.

Abstract: A data storage device utilized for accessing boot data includes a flash memory, a controller and a RAM. The flash memory includes several blocks, and each block includes several pages. The controller is coupled to the flash memory and the RAM. The controller receives a write command from a host and determines whether the data of the write command is system data or normal data. If the data to be written is system data, the controller transmits a confirm message to the host after the system data has been completely stored on the data storage device.

Abstract: The invention introduces an apparatus for searching linked lists at least including: a memory arranged to operably store a linked list; a linked-list search engine arranged to operably search content of the linked list until a search success or fail and generate a search result; and a processing unit arranged to operably write the content of the linked list into the memory, drive the linked-list search engine to start a search on the linked list and obtain the search result from the linked-list search engine.

Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side when loading and executing program code of a first layer, at least including: receiving a slot bit table (SBT) including an entry from a second layer, where each entry is associated with an IO operation; receiving a plurality of addresses of callback functions from the second layer; and repeatedly executing a loop until IO operations of the SBT have been processed completely, and, in each iteration of the loop, calling the callback functions implemented in the second layer for a write operation or a read operation of the SBT to drive the frontend interface through the second layer.

Abstract: A memory controller coupled to a memory device and a host device and configured to control access operations of the memory device includes a buffer memory, a host interface, a microprocessor and a data protection engine. The host interface is coupled to the host device and configured to write data received from the host device into the buffer memory and issue a buffer memory write complete notification after the data has been written in the buffer memory. The microprocessor is configured to trigger a data protection operation in response to the buffer memory write complete notification. The protection engine is configured to perform the data protection operation to generate corresponding protection information according to the data written in the buffer memory. The microprocessor is configured to directly trigger the data protection operation after confirming that the data has been written in the buffer memory.

Abstract: A memory controller coupled to a memory device and configured to control access operations of the memory device includes a data protection engine and a microprocessor. The data protection engine is configured to generate protection information according to data received from a host device. The microprocessor is configured to detect a status of the memory device in response to one or more write operations for writing the data to the memory device, determine whether a portion of the data has to be excluded when generating the protection information corresponding to the data according to the status and accordingly generate a determination result, and store the protection information and the determination result together in the memory device. The determination result indicates which portion of the data is utilized to generate the protection information.

Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side, at least including: in response to different types of host IO commands, using multiple stages of a generic framework to drive a frontend interface to interact with a host side for transmitting user data read from a storage unit to the host side, and receiving user data to be programmed into the storage unit from the host side. The frontend interface includes a register, and a data line coupled to the host side. The stages of the generic framework are used to access to the register of the frontend interface and operate the data line of the frontend interface to complete interactions with the host side.

Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side, at least including: in response to different types of host IO commands, using multiple stages of a generic framework to drive a frontend interface to interact with a host side for transmitting user data read from a storage unit to the host side, and receiving user data to be programmed into the storage unit from the host side.

Abstract: The invention introduces an apparatus for controlling data access that includes a memory, an access interface and a processing unit. The processing unit is arranged to operably receive logical-to-physical (L2P) mapping information corresponding to a programming operation through the access interface and store the L2P mapping information in the memory; searching the L2P mapping information to obtain a first logical address associated with user data stored in space of each physical address and a second logical address associated with user data stored in space of each next physical address; generating content of a plurality of entries of a link-based L2P mapping sub-table in the order of logical addresses, wherein each entry of the link-based L2P mapping sub-table stores information about a physical address and a second logical address associated with a corresponding first logical address; and store the link-based L2P mapping sub-table.