Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for synthetic data generation for service recommendation models. One of the methods includes generating a plurality of synthetic data items, each synthetic data item including user data, context data, service data of a service, and user action data characterizing one or more user actions with respect to the service; for each synthetic data item of the plurality of synthetic data items, processing the synthetic data item using an evaluator to generate a score indicating quality of the synthetic data item; selecting a subset of synthetic data items from the plurality of synthetic data items; and providing the subset of synthetic data items into a service recommendation model for recommending one or more services to one or more users based on the subset of synthetic data items.

Abstract: A crowdsourced energy system includes a plurality of distributed energy resources managed by crowdsourcees of the system, a power network to which the distributed energy resources are connected, and a system operator that manages energy trading transactions and energy delivery within the system, the system operator operating at least one computing device configured to: obtain day-ahead peer-to-peer energy trading transaction requests from crowdsourcees for energy to be delivered from the distributed energy resources, estimate day-ahead energy load and solar forecasts, determine optimal power flow for the delivery of energy, and schedule delivery of energy from the distributed energy resources across the power network based upon the energy trading transaction requests, the estimated forecasts, and the determined optimal power flow.

Abstract: In-place recovery of fatal system errors at virtualization hosts. A device identifies an occurrence of a fatal system error in the first instance of a host operating system (OS) executing in a computer system. The device determines to perform an in-place recovery for the fatal system error. The device performs the in-place recovery, including pausing the execution of a virtual machine (VM) by the first instance of the host OS, preserving a state of the VM within system memory of the computer system, and resuming the execution of the VM by a second instance of the host OS executing in the computer system based on the state of the VM that is preserved within the system memory of the computer system.

Abstract: A cushion package box includes a box body, a first cushion member and a plurality of paper tubes. The first cushion member is disposed in the box body and the first cushion member has a porous structure. The plurality of paper tubes is disposed in the box body. At least one of the plurality of paper tubes is in contact with the first cushion member. An opening direction of the porous structure is different from an opening direction of the at least one paper tube.

Abstract: An antenna structure and an electronic device, are provided. The antenna structure includes a first antenna and a second antenna, the first antenna includes a first radiator, a second radiator, a first port, and a second port, and the second antenna includes a third radiator and a third port. The first radiator, the second radiator, and the third radiator jointly constitute a ring structure, and there is a first gap between the first radiator and the second radiator, a second gap between the first radiator and the third radiator, and a third gap between the second radiator and the third radiator.

Abstract: This application discloses a filtering method, a filtering model training method, and a related apparatus, and belongs to the field of coding technologies. The method includes: determining K groups of filtering models based on a quantization parameter of a target image, determining a reconstructed block corresponding to a current coding block in the target image, determining a target filtering model from the K groups of filtering models, and filtering the reconstructed block based on the target filtering model. A same group of filtering models is applicable to coding blocks with same coding quality, different groups of filtering models are applicable to coding blocks with different coding quality, and different filtering models in a same group of filtering models are applicable to coding blocks with different content.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.

Abstract: Recesses may be formed in portions of an ILD layer of a semiconductor device in a highly uniform manner. Uniformity in depths of the recesses may be increased by configuring flows of gases in an etch tool to promote uniformity of etch rates (and thus, etch depth) across the semiconductor device, from semiconductor device to semiconductor device, and/or from wafer to wafer. In particular, the flow rates of gases at various inlets of the tch tool may be optimized to provide recess depth tuning, which increases the process window for forming the recesses in the portions of the ILD layer. In this way, the increased uniformity of the recesses in the portions of the ILD layer enables highly uniform capping layers to be formed in the recesses.

Abstract: Disclosed are a multilingual event causality identification method and a multilingual event causality identification system based on meta-learning with knowledge.

Abstract: Recesses may be formed in portions of an ILD layer of a semiconductor device in a highly uniform manner. Uniformity in depths of the recesses may be increased by configuring flows of gases in an etch tool to promote uniformity of etch rates (and thus, etch depth) across the semiconductor device, from semiconductor device to semiconductor device, and/or from wafer to wafer. In particular, the flow rates of gases at various inlets of the etch tool may be optimized to provide recess depth tuning, which increases the process window for forming the recesses in the portions of the ILD layer. In this way, the increased uniformity of the recesses in the portions of the ILD layer enables highly uniform capping layers to be formed in the recesses.

Abstract: In-place recovery of fatal system errors at virtualization hosts. A device identifies an occurrence of a fatal system error in the first instance of a host operating system (OS) executing in a computer system. The device determines to perform an in-place recovery for the fatal system error. The device performs the in-place recovery, including pausing the execution of a virtual machine (VM) by the first instance of the host OS, preserving a state of the VM within system memory of the computer system, and resuming the execution of the VM by a second instance of the host OS executing in the computer system based on the state of the VM that is preserved within the system memory of the computer system.

Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure including sacrificial gate electrode is formed over a substrate. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The recessing the first dielectric layer comprises a first etching operation and a second etching operation using a different etching as from the first etching operation.

Abstract: An antenna and an electronic device are provided. The antenna includes a plate body. The plate body is provided with at least one antenna unit. Each antenna unit includes a groove formed in the plate body, a coupling frame body, four radiators, four couplers, and four electric conductors. The four radiators and the four couplers are disposed in a space enclosed by the coupling frame body. The coupling frame body is disposed in the groove. Each radiator is provided with a feed point. Different electric conductors penetrate through the groove bottom of the groove and are respectively connected to the feed points on different radiators. The four radiators access two pairs of differential signals and are connected to the four electric conductors in a one-to-one correspondence.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.

Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure including sacrificial gate electrode is formed over a substrate. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The recessing the first dielectric layer comprises a first etching operation and a second etching operation using a different etching as from the first etching operation.

Abstract: A heat sink includes a casing and a capillary structure. The casing includes a chamber filled with a working fluid. The capillary structure is located in the chamber. The capillary structure includes a plurality of capillary pores of different diameters. The capillary structure includes at least one supporting portion connected to a substrate. The substrate and the at least one supporting portion abut two opposite inner faces of the casing, respectively.