Abstract: Semiconductor devices are provided. A semiconductor device includes a power switch, a first power mesh and a second power mesh. The power switch has a first terminal and a second terminal. The first power mesh is directly connected to the first terminal of the power switch. The second power mesh is directly connected to the second terminal of the power switch. The first power mesh includes a first power rail over the power switch and extending in a first direction. The second power mesh includes a second power rail under the power switch and extending in the first direction. The first and second power rails are separated from each other.

Abstract: A method of forming an integrated circuit device includes forming first segments extending in a first direction in a first conductive layer; forming second segments extending in the first direction in the first conductive layer, the forming the first and second segments including: interspersing the first and second segments relative to a second direction perpendicular to the first direction such that: the first segments are symmetrically spaced apart relative to each other, the second segments are symmetrically spaced apart relative to each other, and ones of the second segments are substantially asymmetrically spaced between corresponding adjacent ones of the first segments.

Abstract: A cushion package box includes a box body, a first cushion member and a plurality of paper tubes. The first cushion member is disposed in the box body and the first cushion member has a porous structure. The plurality of paper tubes is disposed in the box body. At least one of the plurality of paper tubes is in contact with the first cushion member. An opening direction of the porous structure is different from an opening direction of the at least one paper tube.

Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first tier, a second tier, and a third tier. The first tier includes an interposer. The second tier is disposed on the first tier and includes a bottom die. The third tier is disposed on the second tier and includes a plurality of first dies and at least one second die. The at least one second die is disposed between the plurality of first dies. The plurality of first dies are electrically connected to the bottom die by a plurality of first connectors to form a signal path, the plurality of first dies are electrically connected to the interposer by a plurality of second connectors to form a power path, and the plurality of first connectors are closer to the at least one second die than the plurality of second connectors.

Abstract: A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises a top plate, a plurality of drain pads, a plurality of slanted sections, a gate pad, and a plurality of source pads. The top plate of the lead frame comprises a thicker region and a thinner region. Each slanted section of the plurality of slanted sections connects a respective drain pad of the plurality of drain pads to the top plate. A respective side surface of each drain pad of the plurality of drain pads is exposed from a side surface of the molding encapsulation. A respective bottom surface of each drain pad of the plurality of drain pads is exposed from a bottom surface of the molding encapsulation. A top surface of the thicker region is exposed from a top surface of the molding encapsulation.

Abstract: Provided herein is a technology for an Autonomous Vehicle Cloud System (AVCS). This AVCS provides sensing, data fusion, prediction, decision-making, and/or control instructions for specific vehicles at a microscopic level based on data from one or more of other vehicles, roadside unit (RSU), cloud-based platform, and traffic control center/traffic control unit (TCC/TCU). Specifically, the AVs can be effectively and efficiently operated and controlled by the AVCS. The AVCS provides individual vehicles with detailed time-sensitive control instructions for fulfilling driving tasks, including car following, lane changing, route guidance, and other related information. The AVCS is configured to predict individual vehicle behavior and provide planning and decision-making at a microscopic level. In addition, the AVCS is configured to provide one or more of virtual traffic light management, travel demand assignment, traffic state estimation, and platoon control.

Abstract: An antenna structure and an electronic device, are provided. The antenna structure includes a first antenna and a second antenna, the first antenna includes a first radiator, a second radiator, a first port, and a second port, and the second antenna includes a third radiator and a third port. The first radiator, the second radiator, and the third radiator jointly constitute a ring structure, and there is a first gap between the first radiator and the second radiator, a second gap between the first radiator and the third radiator, and a third gap between the second radiator and the third radiator.

Abstract: This application discloses a filtering method, a filtering model training method, and a related apparatus, and belongs to the field of coding technologies. The method includes: determining K groups of filtering models based on a quantization parameter of a target image, determining a reconstructed block corresponding to a current coding block in the target image, determining a target filtering model from the K groups of filtering models, and filtering the reconstructed block based on the target filtering model. A same group of filtering models is applicable to coding blocks with same coding quality, different groups of filtering models are applicable to coding blocks with different coding quality, and different filtering models in a same group of filtering models are applicable to coding blocks with different content.

Abstract: A package structure includes a circuit substrate, a semiconductor package, a thermal interface material, a lid structure and a heat dissipation structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The thermal interface material is disposed on the semiconductor package. The lid structure is disposed on the circuit substrate and surrounding the semiconductor package, wherein the lid structure comprises a supporting part that is partially covering and in physical contact with the thermal interface material. The heat dissipation structure is disposed on the lid structure and in physical contact with the supporting part of the lid structure.

Abstract: The invention provides systems and methods for a function-based computing power allocation system (FCPAS), which is a component of an Intelligent Road Infrastructure System (IRIS). The FCPAS incorporates advanced computing capabilities that effectively allocate computational power for prediction, planning, and decision making functions. Specifically, through the FCPAS, an AV can acquire additional computational resources for vehicle prediction, planning, and decision-making functions, thereby enabling safe and efficient autonomous driving. Additionally, tailored to different traffic scenarios, the FCPAS can allocate data and computational resources (including but not limited to CPU and GPU) for vehicle automation.

Abstract: A package structure is provided. The package structure includes a first package component mounted on a substrate, a lid structure disposed on the substrate and around the first package component, and a thermal interface material vertically sandwiched between the plurality of integrated circuit dies of the first package component and the lid structure. The first package component includes a plurality of integrated circuit dies and an underfill formed between the integrated circuit dies. The lid structure covers the integrated circuit dies and exposes the underfill. A first portion and a second portion of the thermal interface material are laterally separated from each other, and a space between the first portion and the second portion is exposed from the lid structure.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes obtaining netlist data for a computer chip; and generating a computer chip placement, comprising placing a respective macro node at each time step in a sequence comprising a plurality of time steps, the placing comprising, for each time step: generating an input representation for the time step; processing the input representation using a node placement neural network having a plurality of network parameters, wherein the node placement neural network is configured to process the input representation in accordance with current values of the network parameters to generate a score distribution over a plurality of positions on the surface of the computer chip; and assigning the macro node to be placed at the time step to a position from the plurality of positions using the score distribution.

Abstract: An air conditioning system including a four-way valve including a first port, a second port, a third port and a fourth port, at least the first port and the third port are fluidly isolated; a compressor, an output end and an input end of which are in communication with the first port and the third port respectively; a first evaporator, a first end of which is in communication with the third port; a second evaporator and a condenser, first ends of which are in communication with one of the second port and the fourth port respectively; wherein a second end of the condenser, a second end of the first evaporator, and a second end of the second evaporator are in communication at a first node, and a first throttling valve, a second throttling valve and a third throttling valve are respectively disposed between the condenser and the first node.

Abstract: A conductive line structure includes: first and second offset sets of long pillars that are substantially coaxial on an intra-set basis; a third set of offset short pillars, the short pillars being: overlapping of long pillars in the first and second sets; and organized into groups of first quantities of the short pillars; each of the groups being overlapping of and electrically coupled between a pair of one of the long pillars in the first set and a one of the long pillars in the second set such that, in each of the groups, each short pillar being overlapping of and electrically coupled between the pair; and each long pillar in each of the first and second sets being overlapped by a second quantity of short pillars in the third set and being electrically coupled to same; and the first quantity being less than the second quantity.

Abstract: A method for etching a magnetic tunneling junction (MTJ) structure is described. A MTJ stack is deposited on a bottom electrode wherein the MTJ stack comprises at least a pinned layer, a barrier layer on the pinned layer, and a free layer on the barrier layer, A top electrode layer is deposited on the MTJ stack. A hard mask is deposited on the top electrode layer. The top electrode layer and hard mask are etched. Thereafter, the MTJ stack not covered by the hard mask is etched, stopping at or within the pinned layer. Thereafter, an encapsulation layer is deposited over the partially etched MTJ stack and etched away on horizontal surfaces leaving a self-aligned hard mask on sidewalls of the partially etched MTJ stack. Finally, the remaining MTJ stack not covered by hard mask and self-aligned hard mask is etched to complete the MTJ structure.

Abstract: A computing system coupled to at least one vehicle includes a processing circuit comprising one or more processors coupled to one or more memory devices storing instructions therein that, when executed by the one or more processors, cause the processing circuit to: obtain, from a third-party remote computing system, first information; receive, from a vehicle, vehicle information comprising a calibration identifier, generate, based on the first information and the vehicle information, custom calibration information; and transmit, over a network, the custom calibration information to the vehicle that replaces at least a portion of the vehicle information stored in at least one vehicle controller of the vehicle.

Abstract: Recesses may be formed in portions of an ILD layer of a semiconductor device in a highly uniform manner. Uniformity in depths of the recesses may be increased by configuring flows of gases in an etch tool to promote uniformity of etch rates (and thus, etch depth) across the semiconductor device, from semiconductor device to semiconductor device, and/or from wafer to wafer. In particular, the flow rates of gases at various inlets of the tch tool may be optimized to provide recess depth tuning, which increases the process window for forming the recesses in the portions of the ILD layer. In this way, the increased uniformity of the recesses in the portions of the ILD layer enables highly uniform capping layers to be formed in the recesses.

Abstract: A package structure includes a circuit substrate, a semiconductor device and a ring structure. The circuit substrate has a first region and a second region connected thereto. The circuit substrate includes at least one routing layer including a dielectric portion and a conductive portion disposed thereon. A first ratio of a total volume of the conductive portion of the routing layer within the first region to a total volume of the dielectric and conductive portions of the routing layer within the first region is less than a second ratio of a total volume of the conductive portion of the routing layer within the second region to a total volume of the dielectric and conductive portions of the routing layer within the second region. The semiconductor device is disposed over the circuit substrate within the first region, and is electrically coupled to the circuit substrate. The ring structure is disposed over the circuit substrate within the second region.

Abstract: A package structure is provided. The package structure includes a semiconductor die over a redistribution structure, bonding elements below the redistribution structure, and an underfill layer surrounding the bonding elements and the redistribution structure. The semiconductor die has a rectangular profile in a plan view. A pitch of the bonding elements is defined as the sum of a diameter of the bonding elements and a spacing between neighboring two of the bonding elements. A first circular area of the redistribution structure is entirely covered and in direct contact with the underfill layer. The center of the first circular area is aligned with a first corner of the rectangular profile of the semiconductor die. A diameter of the first circular area is greater than twice the pitch of the bonding elements.

Abstract: A fan-out package includes a redistribution structure having redistribution-side bonding structures, a plurality of semiconductor dies including a respective set of die-side bonding structures that is attached to a respective subset of the redistribution-side bonding structures through a respective set of solder material portions, and an underfill material portion laterally surrounding the redistribution-side bonding structures and the die-side bonding structures of the plurality of semiconductor dies. A subset of the redistribution-side bonding structures is not bonded to any of the die-side bonding structures of the plurality of semiconductor dies and is laterally surrounded by the underfill material portion, and is used to provide uniform distribution of the underfill material during formation of the underfill material portion.