Abstract: The invention provides a process for forming crack-free dielectric films on a substrate. The process comprise the application of a dielectric precursor layer of a thickness from about 0.3 ?m to about 1.0 ?m to a substrate. The deposition is followed by low temperature heat pretreatment, prepyrolysis, pyrolysis and crystallization step for each layer. The deposition, heat pretreatment, prepyrolysis, pyrolysis and crystallization are repeated until the dielectric film forms an overall thickness of from about 1.5 ?m to about 20.0 ?m and providing a final crystallization treatment to form a thick dielectric film. Also provided was a thick crack-free dielectric film on a substrate, the dielectric forming a dense thick crack-free dielectric having an overall dielectric thickness of from about 1.5 ?m to about 20.0 ?m.

Abstract: A high-reliability gate driving circuit includes a plurality of odd shift register stages and a plurality of even shift register stages. Each odd shift register stage generates a corresponding gate signal furnished to a corresponding odd gate line according to a first clock and a second clock having a phase opposite to the first clock, and further functions to pull down a gate signal of at least one even gate line or at least one odd gate line different from the corresponding odd gate line. Each even shift register stage generates a corresponding gate signal furnished to a corresponding even gate line according to a third clock and a fourth clock having a phase opposite to the third clock, and further functions to pull down a gate signal of at least one odd gate line or at least one even gate line different from the corresponding even gate line.

Abstract: A thin film transistor device, disposed on a substrate, includes a gate electrode, a semiconductor channel layer, a gate insulating layer disposed between the gate electrode and the semiconductor channel layer, a source electrode and a drain electrode disposed at two opposite sides of the semiconductor channel layer and partially overlapping the semiconductor channel layer, respectively, a capacitor electrode at least partially overlapping the gate electrode, and a capacitor dielectric layer disposed between the capacitor electrode and the gate electrode. The capacitor electrode, the gate electrode and the capacitor dielectric layer form a capacitor device.

Abstract: An LCD device includes a plurality of data lines, a plurality gate lines, a pixel matrix, and a source driver. The pixel matrix includes an mth pixel column and an (m+1)th pixel column. The odd-numbered pixels of the mth pixel column are coupled to an mth data line and corresponding odd-numbered gate lines. The even-numbered pixels of the mth pixel column is coupled to an (m+1)th data line and corresponding even-numbered gate lines. The odd-numbered pixels of the (m+1)th pixel column is coupled to the (m+1)th data line and corresponding odd-numbered gate lines. The even-numbered pixels of the (m+1)th pixel column is coupled to an (m+2)th data line and corresponding even-numbered gate lines. The gate driver outputs the data driving signals having a first polarity to the odd-numbered data lines, and outputs the data driving signals having a second polarity to the even-numbered data lines.

Abstract: A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.

Abstract: A coordinate positioning method to control the movement of the vernier on the display is disclosed. The method includes operating the electronic pen on the substrate having the waterprint pattern, capturing the image of the least one basis pixel where the electronic pen located on, transforming the basis pixel to the current coordinate, which is an absolute coordinate, and moving the vernier on the display to a position corresponding to the current coordinate.

Abstract: A vapor chamber includes a sealed flattened casing containing working liquid therein, a wick structure arranged on an inner face of the casing, a supporting plate received in the casing and a plurality of supporting posts. The supporting plate defines a plurality of fixing holes therein. The supporting posts are engagingly received in the fixing holes of the supporting plate. Top and bottom ends of the supporting posts engage with the wick structure to reinforce a structure of the vapor chamber.

Abstract: The present invention relates to a shift register having a plurality of stages electrically coupled to each other in series. Each stage includes a first and second TFT transistor. The first TFT transistor has a get electrically coupled to the output of the immediately prior stage, a drain electrically coupled to the boost point of the stage, and a source configured to receive one of the first and second control signals. The second TFT transistor has a get electrically coupled to the output of the immediately next stage, a drain and a source electrically coupled the drain and the source of the first transistor, respectively.

Abstract: The present invention discloses a switching regulator with transient control function, and a control circuit and a method for controlling the switching regulator. The switching regulator with transient control function includes: a power conversion circuit for receiving an input voltage and converting the input voltage to an output voltage; a feedback circuit for detecting the output voltage and generating a feedback signal representing the output voltage; an output capacitor coupled to an output terminal of the power conversion circuit; and a control circuit for receiving the feedback signal and generating a control signal to control the conversion operation by the power conversion circuit accordingly, wherein the control circuit includes a voltage balancing circuit which discharges the output capacitor when the output voltage is higher than a first predetermined threshold, and charges the output capacitor when the output voltage is lower than a second predetermined threshold.

Abstract: Imidazol-4-one or imidazole-4-thione compounds of formula (I): wherein X, R1, R2, R3, R4, R5, and R6 are defined herein. Also disclosed is a method for treating a cannabinoid receptor-mediated disorder with these compounds.

Abstract: A vapor chamber includes a sealed flattened casing containing working liquid therein, a wick structure arranged on an inner face of the casing, a plurality of supporting posts received in the casing and at least a metallic wire connecting the supporting posts. Each supporting post defines at least a channel therein. The at least a metallic wire engagingly extends through the channels of the supporting posts. Top and bottom ends of the supporting posts engage the wick structure to reinforce a structure of the vapor chamber.

Abstract: A main computer for vehicle includes a central processing unit and a programmable logic device. The central processing unit is configured for controlling operations of the main computer. The programmable logic device is coupled to the central processing unit and includes a built-in power state machine for managing power statuses of the main computer. The power state machine includes a turn-off status, an operating status, and a predetermined status located between the turn-off status and the operating status.

Abstract: A liquid crystal display (LCD) is provided. The LCD includes a display panel and a voltage supply device (VSD). The display panel includes a plurality of scan lines, a plurality of data lines disposed substantially perpendicularly with the scan lines, and a plurality of pixels. The pixels are respectively electrically connected with the corresponding data line and the corresponding scan line, and are arranged in an array. Each of the pixels includes a common line and a compensation line, wherein the common line is located in the transparent area to receive a common voltage, and the compensation line is located in the reflection area to receive a stable voltage. The VSD is coupled to the compensation line of each of the pixels for continuously and correspondingly providing the stable voltage to the compensation line of each of the pixels.

Abstract: A liquid crystal display panel includes a sub-pixel array, a plurality of scan lines, and a plurality of data lines. The sub-pixel array has a plurality of sub-pixels arranged in array. Any two neighboring scan lines of the scan lines and a row of the sub-pixels disposed between the two neighboring scan liens are electrically connected. The sub-pixels arranged in odd rows are electrically connected to the odd-numbered data lines, and the sub-pixels arranged in even rows are electrically connected to the even-numbered data lines. Thus, the liquid crystal display panel is able to reduce mura phenomenon through the above-mentioned layout. A driving method of the above-mentioned liquid crystal display panel is also provided.

Abstract: A pen-shaped input apparatus is disclosed in the disclosure. The pen-shaped input apparatus includes a body portion, a capturing module, a transparent spherical portion and a plurality of light sources. The body portion has a side surface. The capturing module is disposed within the body portion and adjacent to the side surface. The capturing module includes an optical sensor and a lens unit. The transparent spherical portion is disposed on the side surface. The transparent spherical portion, the lens unit and the optical sensor are lined on a capturing optical axis. The light sources are located between the side surface of the body portion and the transparent spherical portion. The light sources are symmetrically disposed around the capturing optical axis.

Abstract: A compound of formula (I): wherein A, B, D, X, Y, R1, R2, R3, m, p, and q are defined herein. Also disclosed is a method for inhibiting FMS-like tyrosine kinase 3, aurora kinase, or vascular endothelial growth factor receptor.

Abstract: A structure of water-saving device includes a base, an adjusting ring and a gland. The adjusting ring is mounted in a water-inlet channel. The gland is movably positioned in the base to limit the adjusting ring. A central part of a top surface of the gland sinks downward to form a recess. When water flow impacts the gland, the gland pushes the adjusting ring, such that the adjusting ring is deformed. Since a difference of pressure occurs between a top and bottom surfaces of the gland, the larger the water pressure is, the larger the force from the gland toward the adjusting ring becomes; thus the degree of deformation of the adjusting ring also becomes large, such that the area between the adjusting ring and the bottom surface of the base for water flowing through decreases and the flow of water gradually achieves a stable value.

Abstract: A bidirectional shift register includes first, second, third and fourth control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having first and second input nodes, where the shift register stages are grouped into a first section and a second section, where the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.

Abstract: A discharging device is used to reduce the voltage level at a bootstrap point in an electronic circuit such as a shift register circuit. In such a circuit, a first transistor in a conducting state receives an input pulse and conveys it to the gate terminal of a second transistor, causing the second transistor to be in a conducting state. This gate terminal is known as a bootstrap point. After receiving the input pulse, an output pulse is produced at one drain/source terminal of the second transistor. During the time period of the output pulse, the first transistor is in a non-conducting state and the voltage level at the bootstrap point is high, imposing a stress upon the first transistor. A discharging circuit consisting of at least one transistor is coupled to the bootstrap point in order to reduce the voltage level at the output pulse period.

Abstract: A Schottky diode with a lowered forward voltage drop has an N? type doped drift layer formed on an N+ type doped layer. The N? type doped drift layer has a surface formed with a protection ring inside which is a P-type doped layer. The surface of the N? type doped drift layer is further formed with an oxide layer and a metal layer. The contact region between the metal layer and the N? type doped drift layer within the P-type doped layer forms a Schottky barrier. An upward extending N type doped layer is formed on the N+ type doped layer and under the Schottky barrier to reduce the thickness of the N? type doped drift layer under the Schottky barrier. This lowers the forward voltage drop of the Schottky diode.