Patents by Inventor Sheng-Chieh Tsai

Sheng-Chieh Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240284661
    Abstract: The manufacturing method of a semiconductor device includes providing a word line structure and a hard mask stack on the word line structure. The word line structure includes an active area, a word line, an isolation structure and a protection layer, the word line covers a portion of the active area, the isolation structure is adjacent to the active area and the word line, and the protection layer covers the active area, the word line, and the isolation structure. A first photolithography process is performed to etch the hard mask stack by using a photomask along a first direction. A second photolithography process is performed to etch the hard mask stack by using a photomask along a second direction. A protection pillar covering the portion of the active area by etching the protection layer is formed by using the hard mask stack as a mask.
    Type: Application
    Filed: February 21, 2023
    Publication date: August 22, 2024
    Inventor: Sheng Chieh TSAI
  • Patent number: 11956927
    Abstract: A case is provided, including a shell, a fan frame, and a fan module. The shell is internally provided with a backplane and a motherboard, where the motherboard is connected to the backplane along a first axis, the backplane is connected with a plug connector, the plug connector includes a plug connector body and a plurality of connection terminals, and the connection terminals are located in the plug connector body. The fan frame bears the fan module, and the fan module includes a fan assembly and a matching connector. The matching connector is connected to the fan assembly, and the matching connector is connected to the plug connector along a second axis. The matching connector includes a matching connector body and a plurality of matching terminals, and the matching terminals are located in the matching connector body. The fan frame is fixed in the shell.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: April 9, 2024
    Assignee: WISTRON CORPORATION
    Inventors: Jen-Hsien Lo, Wei-Hao Chen, Sheng-Chieh Tsai
  • Patent number: 11809667
    Abstract: A transparent conductive substrate structure used for a thermoforming process includes a transparent cover plate and a touch sensing layer structure. The transparent cover plate includes a toughening layer on one side thereof. The touch sensing layer structure arranged on one surface of the toughening layer, and includes a first transparent conductive layer, a dielectric layer, a barrier layer, a second transparent conductive layer, and a buffer protective layer. Each transparent conductive layer is directly applied to the transparent cover plate, so that the thickness between the transparent conductive layers is below 1 ?m. The thickness between layers may be reduced to increase the sensitivity of the touch sensing layer structure. To prevent each transparent conductive layer and an electrode wire layer from breaking during the thermoforming process, the transparent conductive substrate structure is combined with the buffer protective layer to strengthen the structure of each transparent conductive layer.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: November 7, 2023
    Assignee: NANOBIT TECH. CO., LTD.
    Inventors: Sheng-Chieh Tsai, Yao-Zong Chen, Yu-Yang Chang, Hsiou-Ming Liu
  • Publication number: 20220350443
    Abstract: A transparent conductive substrate structure used for a thermoforming process includes a transparent cover plate and a touch sensing layer structure. The transparent cover plate includes a toughening layer on one side thereof. The touch sensing layer structure arranged on one surface of the toughening layer, and includes a first transparent conductive layer, a dielectric layer, a barrier layer, a second transparent conductive layer, and a buffer protective layer. Each transparent conductive layer is directly applied to the transparent cover plate, so that the thickness between the transparent conductive layers is below 1 ?m. The thickness between layers may be reduced to increase the sensitivity of the touch sensing layer structure. To prevent each transparent conductive layer and an electrode wire layer from breaking during the thermoforming process, the transparent conductive substrate structure is combined with the buffer protective layer to strengthen the structure of each transparent conductive layer.
    Type: Application
    Filed: June 4, 2021
    Publication date: November 3, 2022
    Inventors: Sheng-Chieh TSAI, Yao-Zong CHEN, Yu-Yang CHANG, Hsiou-Ming LIU
  • Publication number: 20220225543
    Abstract: A case is provided, including a shell, a fan frame, and a fan module. The shell is internally provided with a backplane and a motherboard, where the motherboard is connected to the backplane along a first axis, the backplane is connected with a plug connector, the plug connector includes a plug connector body and a plurality of connection terminals, and the connection terminals are located in the plug connector body. The fan frame bears the fan module, and the fan module includes a fan assembly and a matching connector. The matching connector is connected to the fan assembly, and the matching connector is connected to the plug connector along a second axis. The matching connector includes a matching connector body and a plurality of matching terminals, and the matching terminals are located in the matching connector body. The fan frame is fixed in the shell.
    Type: Application
    Filed: April 8, 2021
    Publication date: July 14, 2022
    Inventors: Jen-Hsien Lo, Wei-Hao Chen, Sheng-Chieh Tsai
  • Publication number: 20130240932
    Abstract: A semiconductor light-emitting device and a manufacturing method thereof are provided, wherein the semiconductor light-emitting device includes a substrate, a first type doped semiconductor layer, a light-emitting layer, a second type doped semiconductor layer and an optical micro-structure layer. The first type doped semiconductor layer is disposed on the substrate and includes a base portion and a mesa portion. The base portion has a top surface, and the mesa portion is disposed on the top surface of the base portion. The light-emitting layer is disposed on the first type doped semiconductor layer. The second type doped semiconductor layer is disposed on the light-emitting layer. The optical micro-structure layer is embedded in the first type doped semiconductor layer.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 19, 2013
    Applicant: Genesis Photonics Inc.
    Inventors: Sheng-Han Tu, Gwo-Jiun Sheu, Sheng-Chieh Tsai, Kuan-Yung Liao, Yun-Li Li