Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: A display panel is disclosed having a panel frame that holds cooling fans in an accommodation opening thereof and is provided with a locating groove and an engagement structure around the accommodation opening, a cover frame that has a locating flange fitted into the locating groove of the panel frame and an engagement structure detachably fastened to the engagement structure of the panel frame by hand without tools to lock the cover frame to the panel frame and ventilation ports corresponding to the cooling fans in the accommodation opening of the panel frame, filter members respectively mounted in the ventilation ports and held in place by respective positioning members for removing dust from air passing through.