Patents by Inventor Sheng-Chin Li

Sheng-Chin Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080185620
    Abstract: The present invention relates to the method of manufacturing an image sensor, the method comprising providing a semiconductor substrate, which comprises a pixel array area and a logic area, a plurality of the photodiodes are formed on the semiconductor substrate of the pixel array area, a multilevel interconnect process is processed on the semiconductor substrate, a passivation is doping on the pixel array area and the logic area, removing the passivation on the pixel array area, and a plurality of the color filter arrays are formed on the pixel array area and correspond to the photodiode individually.
    Type: Application
    Filed: April 3, 2008
    Publication date: August 7, 2008
    Inventor: Sheng-Chin Li
  • Publication number: 20070010042
    Abstract: The present invention relates to the method of manufacturing an image sensor, the method comprising providing a semiconductor substrate, which comprises a pixel array area and a logic area, a plurality of the photodiodes are formed on the semiconductor substrate of the pixel array area, a multilevel interconnect process is processed on the semiconductor substrate, a passivation is doping on the pixel array area and the logic area, removing the passivation on the pixel array area, and a plurality of the color filter arrays are formed on the pixel array area and correspond to the photodiode individually.
    Type: Application
    Filed: July 5, 2005
    Publication date: January 11, 2007
    Inventor: Sheng-Chin Li
  • Publication number: 20060148168
    Abstract: A method of fabricating a dynamic random access memory is provided. A word line structure is formed on a substrate. A source region and a drain region are formed in the substrate on each side of the word line structure. Spacers are formed on the sidewalls of the word line structure and then a first dielectric layer having an opening for forming bit line contact and an opening for forming node contact pad is formed. A conductive layer is formed over the substrate covering the first dielectric layer and filling the bit line contact opening and the node contact pad opening. A bit line is defined and a node contact pad is formed in the node contact pad opening. A second dielectric layer having a node contact opening is formed. A node contact is formed in the node contact opening. A bottom electrode is formed on the node contact.
    Type: Application
    Filed: January 6, 2005
    Publication date: July 6, 2006
    Inventors: Sheng-Chin Li, Cluster Lee