Patents by Inventor Sheng FU

Sheng FU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250246903
    Abstract: The present disclosure provides a semiconductor device, which includes a control circuit, a driving circuit, a voltage pull-up device, and a discharging circuit. The control circuit is coupled between a first terminal and a second terminal of the integrated circuit, and provides a first voltage at a first node. The driving circuit is electrically connected to the control circuit at the first node, and provides a trigger signal at a second node in response to an electrostatic discharge (ESD) event occurring at the first terminal or the second terminal. The voltage pull-up device is coupled between the first terminal and the first node, and configured to pull up the first voltage at the first node in response to the ESD event occurring at the first terminal. The discharging circuit is electrically connected to the second node, and coupled between the first terminal and the second terminal.
    Type: Application
    Filed: January 25, 2024
    Publication date: July 31, 2025
    Inventors: SHENG-FU HSU, SHIH-FAN CHEN, LIN-YU HUANG
  • Publication number: 20250248126
    Abstract: A three dimensional semiconductor structure manufacturing method includes the following steps, providing a wafer, and the wafer includes a front side and a back side. A front side of the wafer is adhered to a supporting substrate, a photoresist layer is coated on the back side of the wafer, and the back side of the wafer is etched to form a plurality of grooves on the back side of the wafer. The wafer is diced to form a plurality of semiconductor devices.
    Type: Application
    Filed: January 26, 2024
    Publication date: July 31, 2025
    Inventor: Sheng-Fu HUANG
  • Patent number: 12364023
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a first semiconductor device and second semiconductor device disposed on a semiconductor substrate. The first semiconductor device comprises a first gate structure, a first source region, and a first drain region. The first source and drain regions and are disposed in a first well region. The second semiconductor device comprises a second gate structure, a second source region, and a second drain region. The second source and drain regions are disposed in a second well region. The first and second well regions comprise a first doping type. The first well region is laterally offset from the second well region by a first distance. A third well region is disposed in the semiconductor substrate and laterally between the first and second well regions. The third well region comprises a second doping type opposite the first doping type.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: July 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Ching Huang, Hao-Hua Hsu, Sheng-Fu Hsu
  • Publication number: 20250219539
    Abstract: A control circuit for a switching power supply, can be configured to: obtain a switching frequency of a power transistor in the switching power supply in a sampling period; adjust an on-time of the power transistor to regulate a switching period of the power transistor to decrease a difference between the switching frequency and an expected switching frequency; and where the sampling period is greater than the switching period of the power transistor.
    Type: Application
    Filed: December 18, 2024
    Publication date: July 3, 2025
    Inventors: Shenhua Zhang, Sheng-Fu Hsiao, Chia-Chi Liu
  • Publication number: 20250219543
    Abstract: A control circuit for a switching power supply with adaptive voltage positioning control, can include: a compensation signal generation circuit configured to receive a digital voltage reference signal, a digital voltage sampling signal representing an output voltage of the switching power supply, and a digital droop voltage, and to integrate an error between the digital voltage reference signal and a sum of the digital voltage sampling signal and the digital droop voltage, in order to generate a compensation signal; and an adaptive voltage positioning control circuit configured to generate a positioning signal according to the compensation signal, in order to adjust the output voltage.
    Type: Application
    Filed: December 23, 2024
    Publication date: July 3, 2025
    Inventors: Shenhua Zhang, Sheng-Fu Hsiao
  • Patent number: 12344746
    Abstract: Disclosed is a rubber composition and a tire using the same. The rubber composition comprises a rubber matrix and a compounding component. In parts by weight, every 100 parts by weight of said rubber matrix comprises 5-95 parts by weight of a branched polyethylene, 5-90 parts by weight of a highly unsaturated diene elastomer and 0-30 parts by weight of a low unsaturated diene elastomer; and said compounding component comprises a vulcanization system and a filler. The rubber composition has good aging resistance and mechanical properties, and can be applied for products such as tires, rubber hoses, rubber tapes and so on, in which the traditional, easily aging diene rubber was commonly used.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: July 1, 2025
    Assignees: HANGZHOU XINGLU TECHNOLOGY CO., LTD., ZHEJIANG UNIVERSITY
    Inventors: Tao Xu, Zhi Sheng Fu, An Yang Wu
  • Patent number: 12324230
    Abstract: An embodiment includes a semiconductor device, a plurality of fin structures extending from a substrate, the plurality of fin structures having a plurality of first fin structures and a plurality of second fin structures. The semiconductor device also includes a plurality of isolation regions on the substrate and disposed between the plurality of fin structures. The device also includes a plurality of gate structures on the plurality of isolation regions. The device also includes a plurality of epitaxy structures on one of the plurality of first fin structures. The device also includes a plurality of contact structures on the plurality of epitaxy structures, where the plurality of first fin structures, the plurality of gate structures, the plurality of epitaxy structures, and the plurality of contact structures are components of one or more resonators.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: June 3, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsi-Jung Wu, Sheng-Fu Yu, Ru-Shang Hsiao, Ying-Hsin Lu
  • Publication number: 20250167140
    Abstract: A semiconductor device includes an integrated circuit and one or more guard rings around the integrated circuit in a top view of the semiconductor device. At least one guard ring of the one or more guard rings includes an active region in the substrate, a first plurality of elongated conductive structures extending in a first direction in the top view of the semiconductor device and arranged in a second direction in the top view of the semiconductor device, and a second plurality of elongated conductive structures extending in the second direction and arranged in the first direction. The combination of the first and second pluralities of elongated conductive structures forms a conductive grid above the active region, and provides increased coverage of the surface area of the active region relative to including only the first plurality of elongated conductive structures or only the second plurality of elongated conductive structures.
    Type: Application
    Filed: February 15, 2024
    Publication date: May 22, 2025
    Inventors: Lin-Yu HUANG, Shih-Fan CHEN, Sheng-Fu HSU
  • Publication number: 20250169191
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.
    Type: Application
    Filed: January 21, 2025
    Publication date: May 22, 2025
    Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
  • Publication number: 20250157373
    Abstract: A pixel shifting method and a control method of a display screen are provided. The pixel shifting method is adapted for the display screen, and the display screen includes at least one processor to perform the following steps. When the display screen displays a picture, pixel shifting is performed on a central point of the picture according to a shifting path. A plurality of pixels on the shifting path is allowed to be sequentially displayed on the display screen according to a plurality of different color attributes. The color attribute of each of the plurality of pixels is changed after a cycle of the pixel shifting ends.
    Type: Application
    Filed: August 27, 2024
    Publication date: May 15, 2025
    Inventors: CHIA-MING LU, SHENG-FU KUO, MIN-FENG CHEN, CHENG-YEN CHANG
  • Publication number: 20250120230
    Abstract: An optical structure is provided. The optical structure includes a substrate, a light-emitting element, a glue layer, and a light-adjusting element. The light-emitting element is disposed on the substrate. The glue layer covers the light-emitting element. The light-adjusting element is disposed on the glue layer. Moreover, the refractive index of the glue layer is different from the refractive index of the light-adjusting element.
    Type: Application
    Filed: August 21, 2024
    Publication date: April 10, 2025
    Inventors: Shu-Ching PENG, Yu-Hsi SUNG, Jung-Cheng CHANG, Wei-Chung CHENG, Yin-Cyuan WU, Sheng-Fu WANG, Wen-Yu LEE
  • Publication number: 20250096522
    Abstract: An optoelectronic device includes a first substrate, a second substrate, a photonic integrated circuit, and a laser diode. The second substrate is over the first substrate. The photonic integrated circuit is disposed on the first substrate and includes a first waveguide channel, a second waveguide channel, and a patterned structure. The first waveguide channel and the second waveguide channel are coupled to the patterned structure. The laser diode is disposed on the second substrate and configured to emit a light beam toward the patterned structure.
    Type: Application
    Filed: September 19, 2024
    Publication date: March 20, 2025
    Applicant: AuthenX Inc.
    Inventors: Sheng-Fu LIN, Po-Kuan SHEN, Yi-Ting LU, Chu-Ching TSAI, Jenq-Yang CHANG, Mao-Jen WU
  • Patent number: 12237323
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.
    Type: Grant
    Filed: January 5, 2024
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
  • Publication number: 20250063824
    Abstract: This disclosure is directed to a circuit that includes a substrate, a target device on the substrate, and an electrostatic discharge (ESD) device electrically coupled to the target device. The ESD device includes an ESD detection circuit electrically coupled to a first reference voltage supply and a second reference voltage supply, an inverter circuit electrically coupled to the ESD detection circuit and configured to trigger in response to an ESD event on the first or second reference voltage supply, a rectifier circuit electrically coupled to the inverter circuit and configured to rectify a current discharged from the inverter circuit, and a transistor electrically coupled to the rectifier circuit and configured to discharge a remaining current passing through the rectifier circuit.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Lin-Yu HUANG, Shih-Fan CHEN, Sheng-Fu HSU, Yi-An LAI, Chan-Hong CHERN, Cheng-Hsiang HSIEH
  • Patent number: 12221117
    Abstract: Vehicle control is provided, including: obtaining vehicle information of a target vehicle and environmental information of a reference environment in which the target vehicle is located; obtaining a target matrix based on the vehicle information and the environmental information; splitting the target matrix to obtain a plurality of sub-matrices; and obtaining target driving control information of the target vehicle based on matrix elements in the sub-matrices and driving control information of a surrounding vehicle of the target vehicle.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: February 11, 2025
    Assignee: BEIJING SANKUAI ONLINE TECHNOLOGY CO., LTD
    Inventors: Shuguang Ding, Xiaoyang Guo, Dongchun Ren, Sheng Fu, Deheng Qian
  • Publication number: 20250010294
    Abstract: A method for performing continuous single molecule nucleic acids sequencing is provided. The method includes the following operations. A sequencing chip is placed on a detection module configured to detect a plurality of fluorescent lights having different wavelengths. Each of the plurality of fluorescent lights is generated from one of a plurality of single-molecule nucleic acids of a sample on the sequencing chip, the detection module comprises at least one sensor device, each of the at least one sensor device having a plurality of pixels. In operating the detection module, an objective lens is used to collect one of the plurality of fluorescent lights; and a projective lens is used to concentrate the one of the fluorescent lights to project a spot on the at least one sensor device. A projected spot size of the spot is smaller than or equal to 1.5 times a size of the pixel.
    Type: Application
    Filed: September 18, 2024
    Publication date: January 9, 2025
    Inventors: Chung-Fan CHIOU, Kuang-Po CHANG, Chi-Fu YEN, Sheng-Fu LIN
  • Publication number: 20250015071
    Abstract: Providing a resistor between a gate of a target device (e.g., a gallium nitride (GaN) high-electron-mobility transistor device) and a clamp circuit improves electrostatic discharge (ESD) protection between an input/output (IO) and the target device. For example, the resistor may result in ESD protection between the IO and a source of the target device and between the IO and a drain of the target device may be at least 2 kilovolts under the human body model. Because ESD protection is improved, chances of burn out in the target device are reduced. Additionally, larger currents may be applied in the clamp circuit without risk of ESD.
    Type: Application
    Filed: July 7, 2023
    Publication date: January 9, 2025
    Inventors: Sheng-Fu HSU, Shih-Fan CHEN, Lin-Yu HUANG
  • Publication number: 20250015073
    Abstract: A semiconductor device that includes an n-buried layer, a p-well region over the n-buried layer, an n-channel MOSFET that includes an n-drain region, and a vertical NPN BJT having a collector that is the n-drain region and a base that is the p-well region. The p-well region is floating.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 9, 2025
    Inventors: Ken-Hao FAN, Yu-Ti Su, Sheng-Fu Hsu, Hao-Hua Hsu
  • Patent number: 12180355
    Abstract: The present invention discloses a rubber composition, a processing method thereof, and also a brake fluid-resistant product using the rubber composition and a production method thereof. The rubber composition comprises, in parts by weight, 100 parts of a rubber matrix; 1.5-8 parts of a crosslinking agent 40-140 parts of a reinforcing filler; and 0-40 parts of a plasticizer, wherein the rubber matrix comprises, based on 100 parts by weight of the rubber matrix, a branched polyethylene with a content represented as A, in which 0<A?100 parts; an EPM with a content represented as B, in which 0?B<100 parts; and an EPDM with a content represented as C, in which 0?C<100 parts. The rubber composition is useful in the production of brake fluid-resistant brake rubber hose and brake rubber diaphragm.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: December 31, 2024
    Assignees: HANGZHOU XINGLU TECHNOLOGIES CO., LTD, SHAOXING PINGHE NEW MATERIAL TECHNOLOGY CO., LTD.
    Inventors: Tao Xu, Zhi Sheng Fu, An Yang Wu
  • Publication number: 20240429310
    Abstract: A semiconductor device may include a electrostatic discharge (ESD) protection circuit and a high voltage ESD triggering circuit that is configured to trigger ESD protection for high voltage circuits of the semiconductor device. The high voltage ESD triggering circuit may be implemented by one or more of the example implementations of high voltage ESD triggering circuits described herein. The example implementations of high voltage ESD triggering circuits described herein are capable of handle high voltages of the high voltage circuits included in the semiconductor device. This reduces the likelihood of and/or prevents premature triggering of ESD protection during normal operation for these high voltage circuits, and enables the high voltage circuits to be protected from high voltage ESD events.
    Type: Application
    Filed: June 21, 2023
    Publication date: December 26, 2024
    Inventors: Sheng-Fu HSU, Shih-Fan CHEN, Chen-Yi LEE, Pin-Chen CHEN, Lin-Yu HUANG