Patents by Inventor Sheng Gong

Sheng Gong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7218261
    Abstract: A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calculating a difference value between two adjacent samples in the digital sampled signal; comparing the difference value with a threshold; adding the difference value into a sum of differences value if the difference value is greater than the threshold; and generating the sampling clock for the analog to digital converter according to the sum of differences value.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: May 15, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jin-Sheng Gong, Yu-Pin Kuo, Yu-Pin Chou, Hung-Jen Chu
  • Publication number: 20070035660
    Abstract: A video processing method includes: reading a video signal including a plurality of first fields and a plurality of second fields, where the number of the first fields is different from the number of the second fields; and processing the plurality of first fields of the video signal and/or the plurality of second fields of the video signal to generate a plurality of first pictures and a plurality of second pictures, where the number of the first pictures is equal to the number of the second pictures.
    Type: Application
    Filed: July 27, 2006
    Publication date: February 15, 2007
    Inventor: Jin-Sheng Gong
  • Patent number: 7170469
    Abstract: A method and apparatus for converting a source frame signal received at a first frame rate to a destination frame signal output at a second frame rate. By adjusting the number of pixel data in the destination frame signal, the second frame rate is made to be the same as the first frame rate. Adjusting the amount of non-visible porch signals for at least one horizontal line of the destination frame signal prevents overflow and underflow conditions. The number of non-visible porch signals is increased to prevent underflow or decreased to prevent overflow. The number of non-visible porch signals in the last horizontal line is adjusted to comply with some display devices having a maximum time constraint from a last horizontal sync signal to a vertical sync signal in the destination frame signal.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: January 30, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jin-Sheng Gong, Issac Chen
  • Publication number: 20060285021
    Abstract: An image displaying method for a television includes: selecting a portion of a plurality of display regions of a screen of the television to display a still or animated image when a power-on signal is received; and utilizing all the plurality of display regions to display images corresponding to a television signal after a predetermined time period beginning from when the power-on signal is received. The present invention further discloses an image displaying method for a television, including: selecting a portion of a plurality of display regions of a screen of the television and stopping the displaying of images corresponding to a television signal on the selected display regions when a power-off signal is received; and stopping the displaying of images corresponding to the television signal on all the plurality of display regions after a predetermined time period beginning from when the power-off signal is received.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 21, 2006
    Inventors: Po-Wei Chao, Jin-Sheng Gong, An-Shih Lee
  • Publication number: 20060262809
    Abstract: A source frame signal received at a first frame rate is converted to a destination frame signal output at a second frame rate. By adjusting the clock frequency of the clock signal in the destination frame signal, the second frame rate is made to be the same as the first frame rate. Adjusting the destination clock frequency prevents overflow and underflow conditions. The destination clock frequency is decreased to prevent underflow or increased to prevent overflow. The destination clock frequency during the last horizontal line is adjusted to comply with some display devices having a maximum time constraint from a last horizontal sync signal to a vertical sync signal in the destination frame signal.
    Type: Application
    Filed: August 3, 2006
    Publication date: November 23, 2006
    Inventors: Jin-Sheng Gong, Issac Chen
  • Publication number: 20060204088
    Abstract: An image processing method for adjusting color data of an image is disclosed. The color space of the image is divided into a plurality of color grids and the method includes: providing a first table recorded a plurality of parameters corresponding to the plurality of color grids, respectively; receiving color data of the target pixel of the image; selecting a parameter from the first table according to the color data of the target pixel; and adjusting the color data of the target pixel according to the selected parameter.
    Type: Application
    Filed: December 15, 2005
    Publication date: September 14, 2006
    Inventors: Chun-Hsing Hsieh, Hsien-Chun Chang, Jin-Sheng Gong
  • Publication number: 20060197692
    Abstract: A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calculating a difference value between two adjacent samples in the digital sampled signal; comparing the difference value with a threshold; adding the difference value into a sum of differences value if the difference value is greater than the threshold; and generating the sampling clock for the analog to digital converter according to the sum of differences value.
    Type: Application
    Filed: January 5, 2006
    Publication date: September 7, 2006
    Inventors: Jin-Sheng Gong, Yu-Pin Kuo, Yu-Pin Chou, Hung-Jen Chu
  • Patent number: 7091967
    Abstract: A source frame signal received at a first frame rate is converted to a destination frame signal output at a second frame rate. By adjusting the clock frequency of the clock signal in the destination frame signal, the second frame rate is made to be the same as the first frame rate. Adjusting the destination clock frequency prevents overflow and underflow conditions. The destination clock frequency is decreased to prevent underflow or increased to prevent overflow. The destination clock frequency during the last horizontal line is adjusted to comply with some display devices having a maximum time constraint from a last horizontal sync signal to a vertical sync signal in the destination frame signal.
    Type: Grant
    Filed: September 1, 2003
    Date of Patent: August 15, 2006
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jin-Sheng Gong, Issac Chen
  • Publication number: 20060164551
    Abstract: An analog front-end (AFE) circuit of a digital display is disclosed including: a first circuit to intermittently invert a working clock to generate a control signal and to generate a sampling signal, wherein the sampling signal is corresponding to the working clock; a first analog-to-digital converter (ADC) coupled to the first circuit for converting an analog video signal into a first digital video signal according to the sampling signal; a second analog-to-digital converter coupled to the first circuit for converting the analog video signal into a second digital video signal according to the sampling signal; and a first multiplexer for selectively outputting the first digital video signal or the second digital video signal according to the control signal.
    Type: Application
    Filed: April 11, 2006
    Publication date: July 27, 2006
    Inventors: Chi-Feng Wang, Jui-Yuan Tsai, Yu-Pin Chou, Jin-Sheng Gong
  • Publication number: 20060087592
    Abstract: An image processing circuit for processing a video signal includes: a separator for separating the video signal into a brightness signal and a color signal; a first filter coupled to the separator for filtering the color signal; and a second filter coupled to the separator for filtering the brightness signal.
    Type: Application
    Filed: October 20, 2005
    Publication date: April 27, 2006
    Inventors: Jin-Sheng Gong, Chun-Hsing Hsieh
  • Patent number: 7015839
    Abstract: A method includes utilizing the look-up table to store a plurality of basic values and a plurality of delta value sets, wherein each of the delta value sets represents a difference between a corresponding basic value and another basic value adjacent to the corresponding basic value; determining a first basic value and a first delta value set according to an input value; and generating an output value according to the first basic value and the first delta value set.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: March 21, 2006
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hsien-Chun Chang, Jin-Sheng Gong
  • Publication number: 20050057551
    Abstract: A source frame signal received at a first frame rate is converted to a destination frame signal output at a second frame rate. By adjusting the clock frequency of the clock signal in the destination frame signal, the second frame rate is made to be the same as the first frame rate. Adjusting the destination clock frequency prevents overflow and underflow conditions. The destination clock frequency is decreased to prevent underflow or increased to prevent overflow. The destination clock frequency during the last horizontal line is adjusted to comply with some display devices having a maximum time constraint from a last horizontal sync signal to a vertical sync signal in the destination frame signal.
    Type: Application
    Filed: September 1, 2003
    Publication date: March 17, 2005
    Inventors: Jin-Sheng Gong, Issac Chen
  • Publication number: 20050041043
    Abstract: A method and an apparatus for down-scaling an input image. The input image is composed of a series of image frames which are continuous in a time sequence. These image frames is grouped into at least a first set and a second set of image frames which are continuous and interchanging with each other. Sampling models employed in the present invention are typically following the method of skip-through. However, pixels contained in different sets of image frames are sampled by using different sampling models such that the lost of critical graphic information (e.g. pixel data) can be minimized after down-scaling. These sampled pixels of each image frame of each set are then output continuously by following the same order in the same time sequence. As a result, the complexity in both operation and architecture of the apparatus and the method of the present invention are reduced, and the problems of image blurring and losing partial image data which might otherwise happen in the prior arts are also solved.
    Type: Application
    Filed: July 10, 2003
    Publication date: February 24, 2005
    Inventors: Jin-Sheng Gong, Issac Chen
  • Publication number: 20050024382
    Abstract: A color conversion apparatus and a method of color conversion are described for converting a first color in a first color space to a second color in a second color space. The color conversion apparatus includes a plurality of lookup tables storing color mappings relating the first color space to the second color space and a converter using the lookup tables to convert the first color to the second color. The first color space is the sRGB color space and the second color space is a device dependent color space, or vice versa. To reduce the table size, tables having little effect on the second color contain groups of input colors mapping to a same output color and are implemented with a memory having the address inputs connected to the upper most significant bits of an incoming color value. A gamma correction circuit is used to calculate the remaining tables.
    Type: Application
    Filed: August 3, 2003
    Publication date: February 3, 2005
    Inventors: Hung-Hui Ho, Jin-Sheng Gong, Issac Chen
  • Publication number: 20050012738
    Abstract: A method and apparatus for converting a source frame signal received at a first frame rate to a destination frame signal output at a second frame rate. By adjusting the number of pixel data in the destination frame signal, the second frame rate is made to be the same as the first frame rate. Adjusting the amount of non-visible porch signals for at least one horizontal line of the destination frame signal prevents overflow and underflow conditions. The number of non-visible porch signals is increased to prevent underflow or decreased to prevent overflow. The number of non-visible porch signals in the last horizontal line is adjusted to comply with some display devices having a maximum time constraint from a last horizontal sync signal to a vertical sync signal in the destination frame signal.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Inventors: Jin-Sheng Gong, Issac Chen
  • Publication number: 20040207585
    Abstract: An image signal processing method adapted to an AFE device, which respectively generates first and second colors of digital signals according to first and second colors of analog signals. First, the first color of odd and even signals and the second color of odd and even signals are generated according to the first and second colors of analog signals, respectively. In a single channel mode, the first color of odd or even signal serves as the first color of digital signal for output, and the second color of odd or even signal serves as the second color of digital signal for output. In a dual channel mode, the first color of odd signal and second color of even signal are synchronously outputted, and the first color of even signal and second color of odd signal are also synchronously outputted. The first color of odd and even signals are combined to form the first color of digital signal, and the second color of odd and even signals are combined to form the second color of digital signal.
    Type: Application
    Filed: February 3, 2004
    Publication date: October 21, 2004
    Inventors: Chi-Feng Wang, Szu-Ping Chen, Jui-Yuan Tsai, Jin-Sheng Gong