Patents by Inventor Sheng-Han Yang

Sheng-Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164109
    Abstract: In an embodiment, a device includes: a word line extending in a first direction; a data storage layer on a sidewall of the word line; a channel layer on a sidewall of the data storage layer; a back gate isolator on a sidewall of the channel layer; and a bit line having a first main region and a first extension region, the first main region contacting the channel layer, the first extension region separated from the channel layer by the back gate isolator, the bit line extending in a second direction, the second direction perpendicular to the first direction.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 16, 2024
    Inventors: Meng-Han Lin, Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin
  • Patent number: 11985830
    Abstract: A semiconductor device and method of manufacture are provided. In embodiments a memory array is formed by manufacturing portions of a word line during different and separate processes, thereby allowing the portions formed first to act as a structural support during later processes that would otherwise cause undesired damage to the structures.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Cheng Yang, Meng-Han Lin, Han-Jong Chia, Sheng-Chen Wang, Chung-Te Lin
  • Patent number: 11985825
    Abstract: A memory array device includes a stack of transistors over a semiconductor substrate, a first transistor of the stack being disposed over a second transistor of the stack. The first transistor includes a first memory film along a first word line and a first channel region along a source line and a bit line, the first memory film being disposed between the first channel region and the first word line. The second transistor includes a second memory film along a second word line and a second channel region along the source line and the bit line, the second memory film being disposed between the second channel region and the second word line. The memory array device includes a first via electrically connected to the first word line and a second via electrically connected to the second word line, the second staircase via and the first staircase via having different widths.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han Lin, Feng-Cheng Yang, Sheng-Chen Wang, Sai-Hooi Yeong, Yu-Ming Lin, Han-Jong Chia
  • Publication number: 20240138152
    Abstract: In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Feng-Cheng Yang, Meng-Han Lin, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin
  • Patent number: 8378855
    Abstract: A control device includes a sensor, an analysis unit, and a control unit. The sensor includes a stationary member and a rotatable member. The stationary member includes a first electrode and at least two second electrodes. The rotatable member includes a third electrode and a fourth electrode. The first electrode electrically contacts the third electrode and each second electrode electrically contacts the fourth electrode in sequence when the stationary member is rotated. The analysis unit is configured for determining which second electrode electrically contacts the fourth electrode. The control unit is configured for executing a corresponding command based upon the determination of the analysis unit.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: February 19, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Jiun-Nan Lu, Chih-Hsiang Tsai, Sheng-Han Yang
  • Publication number: 20100109916
    Abstract: A control device includes a sensor, an analysis unit, and a control unit. The sensor includes a stationary member and a rotatable member. The stationary member includes a first electrode and at least two second electrodes. The rotatable member includes a third electrode and a fourth electrode. The first electrode electrically contacts the third electrode and each second electrode electrically contacts the fourth electrode in sequence when the stationary member is rotated. The analysis unit is configured for determining which second electrode electrically contacts the fourth electrode. The control unit is configured for executing a corresponding command based upon the determination of the analysis unit.
    Type: Application
    Filed: May 8, 2009
    Publication date: May 6, 2010
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: JIUN-NAN LU, CHIH-HSIANG TSAI, SHENG-HAN YANG