Patents by Inventor Sheng-Hong Chen

Sheng-Hong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147635
    Abstract: A case with screw thread in a sealed manner for communication equipment includes an upper cover and a bottom cover. The inner surface of the upper cover has an internal screw thread. The outer surface of the bottom cover has an external screw thread. When the external screw thread is fixed with the internal screw thread, the inner surface of the upper cover is in contact with the outer surface of the bottom cover in a sealed state, and the upper cover and the bottom cover form a receiving space. The case provides the following advantages: quickly and repeated assembly and disassembly; no need for any space for bolts so as to minimizes the size; without bolt, no need for washers or sealant; good sealing properties and good waterproof effect so as to prevent water from entering the case.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Sheng Chung Chen, Ben Hong Chen, I Feng Ou
  • Publication number: 20240083828
    Abstract: The present application relates to a system and a method for producing vinyl chloride. The system comprise a preheat unit, a gas-liquid separating unit, a heat-recovery unit, a heating unit and a thermal pyrolysis unit, and therefore heat energy of the thermal pyrolysis product can be efficiently recovered. Energy cost of the system can be efficiently lowered with the heat-recovery unit and the heating unit, and further prolonging operating cycle of the system.
    Type: Application
    Filed: June 28, 2023
    Publication date: March 14, 2024
    Inventors: Wen-Hsi HUANG, Sheng-Yen KO, Shih-Hong CHEN, Chun-Yu LIN
  • Publication number: 20230051621
    Abstract: A semiconductor structure and a method for manufacturing a semiconductor are provided. The semiconductor structure includes a channel pillar, a dielectric layer formed on the channel pillar, a via formed in the dielectric layer and electrically connected to the channel pillar, and a spacer formed between the dielectric layer and the via.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Inventors: Ting-Feng LIAO, Sheng-Hong CHEN, Kuang-Wen LIU
  • Patent number: 11374099
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a source line structure. The source line structure includes a composite material formed in a trench. The composite material includes an oxide portion and a metal portion.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: June 28, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ting-Feng Liao, Sheng-Hong Chen, Kuang-Wen Liu
  • Publication number: 20220020856
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a source line structure. The source line structure includes a composite material formed in a trench. The composite material includes an oxide portion and a metal portion.
    Type: Application
    Filed: July 16, 2020
    Publication date: January 20, 2022
    Inventors: Ting-Feng LIAO, Sheng-Hong CHEN, Kuang-Wen LIU
  • Publication number: 20190280103
    Abstract: A semiconductor structure includes a substrate including a dummy area and an array area adjacent to the dummy area, sub-dummy structures, sub-array structures, a three-dimensional array of memory cells, first conductive structures and second conductive structures. The sub-dummy structures are disposed on the dummy area, and separated from each other by first trenches extending along a first direction. The sub-array structures are disposed on the array area, and separated from each other by second trenches extending along a second direction. The memory cells include cell groups disposed in the sub-array structures, respectively. The first conductive structures and the second conductive structures are disposed in the first trenches and the second trenches respectively. Each of the first conductive structures extends along the first direction, each of the second conductive structure extends along the second direction, and the first direction is different from the second direction.
    Type: Application
    Filed: March 9, 2018
    Publication date: September 12, 2019
    Inventors: Sheng-Hong CHEN, Ting-Feng LIAO
  • Publication number: 20180261621
    Abstract: A semiconductor structure includes a substrate and a plurality of sub-array structures disposed on the substrate. The sub-array structures separated from each other by a plurality of trenches. The semiconductor structure includes a three-dimensional array of memory cells. The memory cells include a plurality of cell groups disposed in the sub-array structures, respectively. The semiconductor structure further includes a plurality of support pillars and a plurality of conductive pillars disposed in the trenches. The support pillars and the conductive pillars in each of the trenches are alternately arranged in an extending direction of the trenches. The semiconductor structure further includes a plurality of conductive lines disposed in the trenches and on the support pillars and the conductive pillars. Each of the conductive lines connects the conductive pillars thereunder.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventors: Sheng-Hong Chen, Ting-Feng Liao
  • Patent number: D1026925
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: May 14, 2024
    Assignee: ARCADYAN TECHNOLOGY CORPORATION
    Inventors: Ben Hong Chen, Sheng Chung Chen