Abstract: A semiconductor structure and a method for manufacturing a semiconductor are provided. The semiconductor structure includes a channel pillar, a dielectric layer formed on the channel pillar, a via formed in the dielectric layer and electrically connected to the channel pillar, and a spacer formed between the dielectric layer and the via.

Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a source line structure. The source line structure includes a composite material formed in a trench. The composite material includes an oxide portion and a metal portion.

Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a source line structure. The source line structure includes a composite material formed in a trench. The composite material includes an oxide portion and a metal portion.

Abstract: A semiconductor structure includes a substrate including a dummy area and an array area adjacent to the dummy area, sub-dummy structures, sub-array structures, a three-dimensional array of memory cells, first conductive structures and second conductive structures. The sub-dummy structures are disposed on the dummy area, and separated from each other by first trenches extending along a first direction. The sub-array structures are disposed on the array area, and separated from each other by second trenches extending along a second direction. The memory cells include cell groups disposed in the sub-array structures, respectively. The first conductive structures and the second conductive structures are disposed in the first trenches and the second trenches respectively. Each of the first conductive structures extends along the first direction, each of the second conductive structure extends along the second direction, and the first direction is different from the second direction.

Abstract: A semiconductor structure includes a substrate and a plurality of sub-array structures disposed on the substrate. The sub-array structures separated from each other by a plurality of trenches. The semiconductor structure includes a three-dimensional array of memory cells. The memory cells include a plurality of cell groups disposed in the sub-array structures, respectively. The semiconductor structure further includes a plurality of support pillars and a plurality of conductive pillars disposed in the trenches. The support pillars and the conductive pillars in each of the trenches are alternately arranged in an extending direction of the trenches. The semiconductor structure further includes a plurality of conductive lines disposed in the trenches and on the support pillars and the conductive pillars. Each of the conductive lines connects the conductive pillars thereunder.