Patents by Inventor Sheng Hou

Sheng Hou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12262479
    Abstract: The present invention relates to an extension structure of flexible substrates with conductive wires thereon. In a first embodiment, three flexible substrates are prepared, each having multiple conductive wires configured on their front surfaces. The third flexible substrate is flipped over, with its conductive wires facing downwards, and bonded across a boundary formed by the first and second flexible substrates. As a result, the corresponding conductive wires between the first and second flexible substrates are electrically coupled with each other through being physically pressed by corresponding conductive wires in the third flexible substrate.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: March 25, 2025
    Assignee: UNEO INC.
    Inventors: Chih-Sheng Hou, Chia-Hung Chou, Hsin-Lin Yu, Si-Wei Chen, Chueh Chiang
  • Publication number: 20250049233
    Abstract: A shelf power control circuit includes a power source, a status sensor, a status detection circuit, a switch, and a control signal detection circuit. The power source is used to supply power, and the status sensor is used to detect a status change of products on a shelf. The status detection circuit is coupled to the status sensor and the power source for generating an enabling signal when the status sensor detects the status change of the products. The switch is coupled to the power source and the status detection circuit for being turned on when receiving the enabling signal and turned off when receiving a disabling signal. The control signal detection circuit is coupled to the switch for generating the disabling signal when the control signal detection circuit is turned on.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 13, 2025
    Applicant: UNIVERSAL CEMENT CORPORATION
    Inventors: Chun-Tse Yang, Chih-Sheng Hou
  • Publication number: 20240402024
    Abstract: A sensor with plurality of sensor elements arranged on a flexible substrate, including a flexible substrate, multiple perforations formed in the flexible substrate, multiple open-ended moat-like cut-out areas formed in the flexible substrate, wherein the perforations and the open-ended moat-like cut-out areas are arranged in a staggered array on the flexible substrate, and each open-ended moat-like cut-out area defines an active area nearly enclosed by one open-ended moat-like cut-out area and connecting the flexible substrate through a bridge feature not enclosed by the open-ended moat-like cut-out area, and multiple sensor elements, wherein each sensor element is set on one active area.
    Type: Application
    Filed: June 5, 2023
    Publication date: December 5, 2024
    Applicant: UNIVERSAL CEMENT CORPORATION
    Inventors: Sih-Wei Chen, Chia-Hung Chou, Chih-Sheng Hou
  • Publication number: 20240349861
    Abstract: This invention provides a beauty treatment method for the scalp and hair and formula and product for the same. The formula is a water-containing cosmetic composition. The beauty treatment method of this invention utilizes an ultrasonic atomizer to atomize the water-containing cosmetic composition into fine mist droplets ranging from 10 nanometers to 100 micrometers in diameters. The atomized water-containing cosmetic composition is then sprayed onto the scalp in the direction against hair stream and massaged into the scalp against the direction of hair stream. The product of this invention is an ultrasonic atomizer filled with the water-containing cosmetic formulation.
    Type: Application
    Filed: August 18, 2021
    Publication date: October 24, 2024
    Inventors: MAU-SHENG HOU, PEI-YING WANG
  • Publication number: 20240314938
    Abstract: The present invention relates to an extension structure of flexible substrates with conductive wires thereon. In a first embodiment, three flexible substrates are prepared, each having multiple conductive wires configured on their front surfaces. The third flexible substrate is flipped over, with its conductive wires facing downwards, and bonded across a boundary formed by the first and second flexible substrates. As a result, the corresponding conductive wires between the first and second flexible substrates are electrically coupled with each other through being physically pressed by corresponding conductive wires in the third flexible substrate.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 19, 2024
    Inventors: Chih-Sheng HOU, Chia-Hung CHOU, Hsin-Lin YU, Si-Wei CHEN, Chueh CHIANG
  • Publication number: 20240135078
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Patent number: 11900037
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Publication number: 20230168138
    Abstract: A cantilever force sensor with relatively lower On-Force is disclosed, which comprises a top stack, a bottom stack, and a spacer. The first spacer is configured between the top stack and the bottom stack and configured in a first side of the force sensor. A second side, opposite to the first side, of the top stack, is cantilevered from the bottom stack. When the force sensor is depressed from the top side, the second side of the top stack moves down using the first spacer as a fulcrum. Since the cantilevered side can be easily depressed down so that the On-Force for the force sensor is reduced and hence a force sensor with a relatively higher sensitivity is created.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 1, 2023
    Inventors: Chih-Sheng HOU, Chia-Hung Chou
  • Patent number: 11609130
    Abstract: A cantilever force sensor with relatively lower On-Force is disclosed, which comprises a top stack, a bottom stack, and a spacer. The first spacer is configured between the top stack and the bottom stack and configured in a first side of the force sensor. A second side, opposite to the first side, of the top stack, is cantilevered from the bottom stack. When the force sensor is depressed from the top side, the second side of the top stack moves down using the first spacer as a fulcrum. Since the cantilevered side can be easily depressed down so that the On-Force for the force sensor is reduced and hence a force sensor with a relatively higher sensitivity is created.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: March 21, 2023
    Assignee: UNEO INC.
    Inventors: Chih-Sheng Hou, Chia-Hung Chou
  • Publication number: 20220284162
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: May 24, 2022
    Publication date: September 8, 2022
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Publication number: 20220228931
    Abstract: A cantilever force sensor with relatively lower On-Force is disclosed, which comprises a top stack, a bottom stack, and a spacer. The first spacer is configured between the top stack and the bottom stack and configured in a first side of the force sensor. A second side, opposite to the first side, of the top stack, is cantilevered from the bottom stack. When the force sensor is depressed from the top side, the second side of the top stack moves down using the first spacer as a fulcrum. Since the cantilevered side can be easily depressed down so that the On-Force for the force sensor is reduced and hence a force sensor with a relatively higher sensitivity is created.
    Type: Application
    Filed: January 19, 2021
    Publication date: July 21, 2022
    Inventors: Chih-Sheng HOU, Chia-Hung CHOU
  • Patent number: 11347920
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: May 31, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-Yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Publication number: 20220163415
    Abstract: A piezosensitive sensor includes a first substrate, a second substrate, a first electrode formed on the first substrate, a second electrode formed on the second substrate, and a sensor array. The sensor array includes a plurality of sensing pixels arranged in rows and columns, each sensing pixel of the plurality of sensing pixels includes a piezosensitive element formed between the first electrode and the second electrode for generating an electrical parameter dependent upon a force applied thereto. A sensing pixel of the plurality of sensing pixels is coupled to an upper sensing pixel, a lower sensing pixel, a left sensing pixel and a right sensing pixel via the first electrode and the second electrode in an up direction, a down direction, a left direction and a right direction, respectively.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Inventors: Shao-Chuan Fang, Chih-Sheng Hou
  • Publication number: 20220121798
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 21, 2022
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Patent number: 11283402
    Abstract: A device includes a sensor configured to provide a temperature-sensitive voltage and an oscillator. The sensor includes: a first transistor, being a diode-connected transistor; a second transistor coupled between a source of the first transistor and ground, wherein a gate of the second transistor is controllable by an enable signal; and a current source configured to control the first transistor and comprising a third transistor, a drain of which is directly connected to a drain of the first transistor, the third transistor being a diode-connected transistor. The oscillator includes: a digital delay cell; and an adjustment device configured to, based on the temperature-sensitive voltage, adjust a delay of the digital delay cell. The digital delay cell produces, based on the adjusted delay, a signal at an oscillation frequency.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: March 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ping-Han Tsai, Chih-Sheng Hou, Po-Yu Chen, Nan-Hsin Tseng
  • Patent number: 11269440
    Abstract: A force sensing device includes a sensor array, a first substrate, a second substrate and a plurality of electrodes. The first substrate has a sensor region and a side region. The second substrate has a sensor region and a side region. The sensor array is formed above the sensor region of the first substrate. The plurality of electrodes are formed on the sensor region and the side region of the first substrate and below the sensor region and the side region of the second substrate, and coupled to the sensor array. The side region of the first substrate, the side region of the second substrate and the plurality of electrodes on the side region are foldable to a back side of the sensor array.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: March 8, 2022
    Assignee: UNIVERSAL CEMENT CORPORATION
    Inventors: Shao-Chuan Fang, Chih-Sheng Hou
  • Publication number: 20220050568
    Abstract: A force sensing device includes a sensor array, a first substrate, a second substrate and a plurality of electrodes. The first substrate has a sensor region and a side region. The second substrate has a sensor region and a side region. The sensor array is formed above the sensor region of the first substrate. The plurality of electrodes are formed on the sensor region and the side region of the first substrate and below the sensor region and the side region of the second substrate, and coupled to the sensor array. The side region of the first substrate, the side region of the second substrate and the plurality of electrodes on the side region are foldable to a back side of the sensor array.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Inventors: Shao-Chuan Fang, Chih-Sheng Hou
  • Publication number: 20220026289
    Abstract: A projective capacitive force sensing structure is provided. The projective capacitive force sensing structure includes a first substrate, a first electrode, a first capacitance material layer, a second substrate, a second electrode and a third electrode. The stacking order of the projective capacitive force sensing structure is from the first substrate to the second substrate. The second electrode and the third are respectively below and above the second substrate. A first signal is detected between the first electrode and the second electrode and is collected by the first electrode. A second signal is detected between the second electrode and the third electrode and is collected by the third electrode. A force applied by an object is determined according to the first signal and a location of the object is determined according to the second signal. Both the force applied by an object and the location of the object are acquired.
    Type: Application
    Filed: July 21, 2021
    Publication date: January 27, 2022
    Inventors: Yann-Cherng Chern, Chih-Sheng Hou
  • Patent number: 11019423
    Abstract: Provided is an active noise cancellation (ANC) method applied for an ANC headphone. The ANC method includes: in a channel estimation mode, estimating a plurality of environment channels by generating, transmitting and capturing a training signal; in the channel estimation mode, tuning a plurality of ANC filters based on the estimated plurality of environment channels; and in a normal mode, performing ANC on an input signal based on the plurality of ANC filters.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: May 25, 2021
    Inventor: Wen-Sheng Hou
  • Publication number: 20210091719
    Abstract: A device includes a sensor configured to provide a temperature-sensitive voltage and an oscillator. The sensor includes: a first transistor, being a diode-connected transistor; a second transistor coupled between a source of the first transistor and ground, wherein a gate of the second transistor is controllable by an enable signal; and a current source configured to control the first transistor and comprising a third transistor, a drain of which is directly connected to a drain of the first transistor, the third transistor being a diode-connected transistor. The oscillator includes: a digital delay cell; and an adjustment device configured to, based on the temperature-sensitive voltage, adjust a delay of the digital delay cell. The digital delay cell produces, based on the adjusted delay, a signal at an oscillation frequency.
    Type: Application
    Filed: December 8, 2020
    Publication date: March 25, 2021
    Inventors: PING-HAN TSAI, CHIH-SHENG HOU, PO-YU CHEN, NAN-HSIN TSENG