Patents by Inventor Sheng-Hsiang Chiang

Sheng-Hsiang Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20230006193
    Abstract: The present disclosure discloses a porous metal matrix composite (MMC), wherein the porous MMC includes a metal material, a spacing material forming an interconnected structure and embedded in the metal material to form an interface between the metal material and the interconnected structure; and a first plurality of pores located at the interface.
    Type: Application
    Filed: June 28, 2022
    Publication date: January 5, 2023
    Inventors: Yi-Ren TZENG, Sheng-Hsiang CHIANG
  • Patent number: 10625446
    Abstract: A high-temperature hot-pressing molding machine includes a mold unit, a heating, unit disposed to heat the mold unit, a heat insulating unit including a surrounding insulating member to enclose the mold unit and two insulating layers disposed on two opposite sides of the mold unit to obstruct heat radiation and conduction from the mold unit, a heat dissipating unit disposed on the insulating layers, a cooling unit disposed on the heat dissipating unit, and a vacuum unit disposed to form a vacuum space. Under a vacuum environment, with the heat insulating unit defining a heat zone containing the mold unit, other component parts adjacent to the heat zone can be prevented from damage in a high temperature operation.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: April 21, 2020
    Assignee: National Formosa University
    Inventors: Shu-Huei Hsieh, Yi-Ren Tzeng, Sheng-Hsiang Chiang, Wen-Chen Liao
  • Patent number: 10361420
    Abstract: Methods for making lead-carbon coupling, lead-carbon electrode sheets, and a lead-carbon battery are revealed. The coupling methods consist of steps of assembling the carbon material that contains oxygen functional groups or metal precursors and lead material in contact with each other and then heating the assembled lead-carbon pair to form lead oxides or metal carbides as a bridge to form coupled lead-carbon interface with high electrochemical and mechanical stability. This coupled lead-carbon structure is applied to form lead-carbon electrode sheets and is further used as electrode sheets of lead-carbon batteries by lead welding.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: July 23, 2019
    Assignee: Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan, R.O.C.
    Inventors: Yi-Ren Tzeng, Sheng-Hsiang Chiang, Wen-Chen Liao, Ann-Tinn Shen, Shu-Huei Hsieh, Yi-Cheng Su, Ya-Wun Jan, Anthony Shiaw-Tseh Chiang
  • Publication number: 20180126608
    Abstract: A high-temperature hot-pressing molding machine includes a mold unit, a heating, unit disposed to heat the mold unit, a heat insulating unit including a surrounding insulating member to enclose the mold unit and two insulating layers disposed on two opposite sides of the mold unit to obstruct heat radiation and conduction from the mold unit, a heat dissipating unit disposed on the insulating layers, a cooling unit disposed on the heat dissipating unit, and a vacuum unit disposed to form a vacuum space. Under a vacuum environment, with the heat insulating unit defining a heat zone containing the mold unit, other component parts adjacent to the heat zone can be prevented from damage in a high temperature operation.
    Type: Application
    Filed: February 6, 2017
    Publication date: May 10, 2018
    Applicant: National Formosa University
    Inventors: Shu-Huei HSIEH, Yi-Ren Tzeng, Sheng-Hsiang Chiang, Wen-Chen Liao
  • Publication number: 20170263912
    Abstract: Methods for making lead-carbon coupling, lead-carbon electrode sheets, and a lead-carbon battery are revealed. The coupling methods consist of steps of assembling the carbon material that contains oxygen functional groups or metal precursors and lead material in contact with each other and then heating the assembled lead-carbon pair to form lead oxides or metal carbides as a bridge to form coupled lead-carbon interface with high electrochemical and mechanical stability. This coupled lead-carbon structure is applied to form lead-carbon electrode sheets and is further used as electrode sheets of lead-carbon batteries by lead welding.
    Type: Application
    Filed: September 6, 2016
    Publication date: September 14, 2017
    Inventors: YI-REN TZENG, SHENG-HSIANG CHIANG, WEN-CHEN LIAO, ANN-TINN SHEN, SHU-HUEI HSIEH, YI-CHENG SU, YA-WUN JAN, ANTHONY SHIAW-TSEH CHIANG
  • Patent number: 9350247
    Abstract: A switch control circuit includes a processor computing an on-time ratio based on an input voltage value, a first output voltage value, and a second output voltage value. The processor further computes an on-time sum based, on an output current value, an inductance value, the input voltage value, the first output voltage value and the second output voltage value, and further computes an operation frequency value that corresponds to the on-time sum. The processor further computes on-time values of a boost mode and a buck-boost mode based on the on-time sum and the on-time ratio. The processor controls a signal generator based on the operation frequency value, the on-time value of the boost mode and the on-time value of the buck-boost mode.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: May 24, 2016
    Assignee: ILI TECHNOLOGY CORPORATION
    Inventors: Wen-Kuen Liu, Ming-Hung Chien, Sheng-Hsiang Chiang
  • Publication number: 20140239720
    Abstract: A switch control circuit includes a processor computing an on-time ratio based on an input voltage value, a first output voltage value, and a second output voltage value. The processor further computes an on-time sum based, on an output current value, an inductance value, the input voltage value, the first-output voltage value and the second output voltage value, and further computes an operation frequency value that corresponds to the on-time sum. The processor further computes on-time values of a boost mode and a buck-boost mode based on the on-time sum and the on-time ratio. The processor controls a signal generator based on the operation frequency value, the on-time value of the boost mode and the on-time value of the buck-boost mode.
    Type: Application
    Filed: February 26, 2014
    Publication date: August 28, 2014
    Applicant: ILI TECHNOLOGY CORPORATION
    Inventors: Wen-Kuen LIU, Ming-Hung Chien, Sheng-Hsiang Chiang