Patents by Inventor Sheng-Hsiang CHUANG

Sheng-Hsiang CHUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210063984
    Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 4, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sing-Tsung Li, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Shou-Wen Kuo, Chien-Ko Liao
  • Publication number: 20210065347
    Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 4, 2021
    Inventors: Chien-Ko LIAO, Ya-Hsun HSUEH, Sheng-Hsiang CHUANG, Hsu-Shui LIU, Jiun-Rong PAI, Shou-Wen KUO
  • Patent number: 10889097
    Abstract: The present disclosure relates to a debonding apparatus. In some embodiments, the debonding apparatus comprises a wafer chuck configured to hold a pair of bonded substrates on a chuck top surface. The debonding apparatus further comprises a pair of separating blades including a first separating blade and a second separating blade placed at edges of the pair of bonded substrates. The first separating blade has a first thickness that is smaller than a second thickness of the second separating blade. The debonding apparatus further comprises a flex wafer assembly configured to pull the pair of bonded substrates upwardly to separate a second substrate from a first substrate of the pair of bonded substrate. By providing unbalanced initial torques on opposite sides of the bonded substrate pair, edge defects and wafer breakage are reduced.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: January 12, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chang-Chen Tsao, Kuo Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Kang Hu
  • Patent number: 10876976
    Abstract: The present disclosure provides an apparatus for substrate inspection, including a chamber, a movable holder in the chamber and configured to hold a substrate and transfer the substrate between a first position and a second position, a first inspector under the first position and the second position in the chamber, and configured to inspect a backside of the substrate, a lifter under the second position in the chamber, and configured to support the substrate and move the substrate from the second position to a third position, and a second inspector near the third position in the chamber and configured to inspect an edge of the substrate at the third position.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Bo-Han Shih, Sheng-Hsiang Chuang, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Patent number: 10872794
    Abstract: A system and method for inline detection of defects on a semiconductor wafer surface during a semiconductor device manufacturing process is disclosed herein. In one embodiment, a method includes: automatically transporting the wafer from a first processing station to an inspection station; scanning a wafer surface using a camera in the inspection station; generating at least one image of the wafer surface; analyzing the at least one image to detect defects on the wafer surface based on a set of predetermined criteria; if the wafer is determined to be defective, automatically transporting the wafer from the inspection station to a stocker; and if the wafer is determined to be not defective, automatically transporting the wafer to a second processing station for further processing in accordance with the semiconductor device manufacturing process.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 22, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Ko Liao, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Shou-Wen Kuo, Ya Hsun Hsueh
  • Patent number: 10852704
    Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: December 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sing-Tsung Li, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Shou-Wen Kuo, Chien-Ko Liao
  • Patent number: 10839507
    Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 17, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Ko Liao, Ya-Hsun Hsueh, Sheng-Hsiang Chuang, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Publication number: 20200343115
    Abstract: An apparatus for inspecting wafer carriers is disclosed. In one example, the apparatus includes: a housing; a load port; a robot arm inside the housing; and a processor. The load port is configured to load a wafer carrier into the housing. The robot arm is configured to move a first camera connected to the robot arm. The first camera is configured to capture a plurality of images of the wafer carrier. The processor is configured to process the plurality of images to inspect the wafer carrier.
    Type: Application
    Filed: July 13, 2020
    Publication date: October 29, 2020
    Inventors: Cheng-Kang HU, Shou-Wen KUO, Sheng-Hsiang CHUANG, Jiun-Rong PAI, Hsu-Shui LIU
  • Patent number: 10714364
    Abstract: An apparatus for inspecting wafer carriers is disclosed. In one example, the apparatus includes: a housing having an opening on a wall of the housing; a load port outside the housing; a robot arm inside the housing; and a processor. The load port is coupled to the wall and configured to load a wafer carrier for inspection. The robot arm is configured to move a first camera connected to the robot arm. The first camera is configured to capture a plurality of images of the wafer carrier. The processor is configured to process the plurality of images to inspect the wafer carrier.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Kang Hu, Shou-Wen Kuo, Sheng-Hsiang Chuang, Jiun-Rong Pai, Hsu-Shui Liu
  • Publication number: 20200108592
    Abstract: The present disclosure relates to a debonding apparatus. In some embodiments, the debonding apparatus comprises a wafer chuck configured to hold a pair of bonded substrates on a chuck top surface. The debonding apparatus further comprises a pair of separating blades including a first separating blade and a second separating blade placed at edges of the pair of bonded substrates. The first separating blade has a first thickness that is smaller than a second thickness of the second separating blade. The debonding apparatus further comprises a flex wafer assembly configured to pull the pair of bonded substrates upwardly to separate a second substrate from a first substrate of the pair of bonded substrate. By providing unbalanced initial torques on opposite sides of the bonded substrate pair, edge defects and wafer breakage are reduced.
    Type: Application
    Filed: December 11, 2019
    Publication date: April 9, 2020
    Inventors: Chang-Chen Tsao, Kuo Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Kang Hu
  • Publication number: 20200072760
    Abstract: The present disclosure provides an apparatus for substrate inspection, including a chamber, a movable holder in the chamber and configured to hold a substrate and transfer the substrate between a first position and a second position, a first inspector under the first position and the second position in the chamber, and configured to inspect a backside of the substrate, a lifter under the second position in the chamber, and configured to support the substrate and move the substrate from the second position to a third position, and a second inspector near the third position in the chamber and configured to inspect an edge of the substrate at the third position.
    Type: Application
    Filed: August 30, 2018
    Publication date: March 5, 2020
    Inventors: BO-HAN SHIH, SHENG-HSIANG CHUANG, HSU-SHUI LIU, JIUN-RONG PAI, SHOU-WEN KUO
  • Patent number: 10569520
    Abstract: The present disclosure relates to a debonding apparatus. In some embodiments, the debonding apparatus comprises a wafer chuck configured to hold a pair of bonded substrates on a chuck top surface. The debonding apparatus further comprises a pair of separating blades including a first separating blade and a second separating blade placed at edges of the pair of bonded substrates diametrically opposite to each other. The first separating blade has a first thickness that is smaller than a second thickness of the second separating blade. The debonding apparatus further comprises a flex wafer assembly placed above the pair of bonded substrates and configured to pull the pair of bonded substrates upwardly to separate a second substrate from a first substrate of the pair of bonded substrate. By providing unbalanced initial torques on opposite sides of the bonded substrate pair, edge defects and wafer breakage are reduced.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: February 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chang-Chen Tsao, Kuo Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Kang Hu
  • Publication number: 20200043812
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Patent number: 10490463
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Publication number: 20190244343
    Abstract: A method for scanning and analyzing a surface, the method comprising: receiving a piece of equipment with a target surface for inspection; receiving an input from a user; determining at least one scan parameter based on the user input; scanning the target surface using an optical detector in accordance with the at least one scan parameter; generating an image of the target surface; correcting the image of the target surface to remove at least one undesired feature to generate a corrected image based on the at least one scan parameter; and analyzing the corrected image to determine at least one geometric parameter of the target surface.
    Type: Application
    Filed: November 29, 2018
    Publication date: August 8, 2019
    Inventors: Sheng-Hsiang CHUANG, Becky LIAO, Cheng-Kang HU, Shou-Wen KUO, Jiun-Rong PAI, Hsu-Shui LIU
  • Publication number: 20190164793
    Abstract: In an embodiment, a system includes a profiler configured to detect variations along a surface of a semiconductor stage; and a jig configured to move the profiler along an axis over the semiconductor stage.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 30, 2019
    Inventors: Cheng-Kang HU, Hsu-Shui LIU, Jiun-Rong PAI, Shou-Wen KUO, Sheng-Hsiang CHUANG, Cheng-Hung CHEN
  • Publication number: 20190164265
    Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.
    Type: Application
    Filed: August 21, 2018
    Publication date: May 30, 2019
    Inventors: Chien-Ko Liao, Ya-Hsun Hsueh, Sheng-Hsiang Chuang, Hsu-Shul Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Publication number: 20190163149
    Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.
    Type: Application
    Filed: July 6, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sing-Tsung Li, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Shou-Wen Kuo, Chien-Ko Liao
  • Publication number: 20190118522
    Abstract: The present disclosure relates to a debonding apparatus. In some embodiments, the debonding apparatus comprises a wafer chuck configured to hold a pair of bonded substrates on a chuck top surface. The debonding apparatus further comprises a pair of separating blades including a first separating blade and a second separating blade placed at edges of the pair of bonded substrates diametrically opposite to each other. The first separating blade has a first thickness that is smaller than a second thickness of the second separating blade. The debonding apparatus further comprises a flex wafer assembly placed above the pair of bonded substrates and configured to pull the pair of bonded substrates upwardly to separate a second substrate from a first substrate of the pair of bonded substrate. By providing unbalanced initial torques on opposite sides of the bonded substrate pair, edge defects and wafer breakage are reduced.
    Type: Application
    Filed: December 14, 2018
    Publication date: April 25, 2019
    Inventors: Chang-Chen Tsao, Kuo Liang Lu, Ru-Liang Lee, Sheng-Hsiang Chuang, Yu-Hung Cheng, Yeur-Luen Tu, Cheng-Kang Hu
  • Publication number: 20190067057
    Abstract: An apparatus for inspecting wafer carriers is disclosed. In one example, the apparatus includes: a housing having an opening on a wall of the housing; a load port outside the housing; a robot arm inside the housing; and a processor. The load port is coupled to the wall and configured to load a wafer carrier for inspection. The robot arm is configured to move a first camera connected to the robot arm. The first camera is configured to capture a plurality of images of the wafer carrier. The processor is configured to process the plurality of images to inspect the wafer carrier.
    Type: Application
    Filed: April 27, 2018
    Publication date: February 28, 2019
    Inventors: Cheng-Kang Hu, Shau-Wen Kuo, Sheng-Hsiang Chuang, Jiun-Rong Pai, Hsu-Shui Liu