Patents by Inventor Sheng-Hsiong Yang

Sheng-Hsiong Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Ultra high voltage MOS transistor device
    Patent number: 8921936
    Abstract: An ultra high voltage MOS transistor device includes a substrate having a first conductivity type and a first recess formed thereon, a gate positioned on the first recess, and a pair of source region and drain region having a second conductivity type formed in two sides of the gate, respectively.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: December 30, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Sung-Nien Tang, Sheng-Hsiong Yang
  • High voltage metal oxide semiconductor device having a multi-segment isolation structure
    Patent number: 8643101
    Abstract: A high voltage metal oxide semiconductor device with low on-state resistance is provided. A multi-segment isolation structure is arranged under a gate structure and beside a drift region for blocking the current from directly entering the drift region. Due to the multi-segment isolation structure, the path length from the body region to the drift region is increased. Consequently, as the breakdown voltage applied to the gate structure is increased, the on-state resistance is reduced.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: February 4, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Ching-Hung Kao, Sheng-Hsiong Yang
  • HIGH VOLTAGE METAL OXIDE SEMICONDUCTOR DEVICE WITH LOW ON-STATE RESISTANCE
    Publication number: 20120267716
    Abstract: A high voltage metal oxide semiconductor device with low on-state resistance is provided. A multi-segment isolation structure is arranged under a gate structure and beside a drift region for blocking the current from directly entering the drift region. Due to the multi-segment isolation structure, the path length from the body region to the drift region is increased. Consequently, as the breakdown voltage applied to the gate structure is increased, the on-state resistance is reduced.
    Type: Application
    Filed: April 20, 2011
    Publication date: October 25, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Hung KAO, Sheng-Hsiong Yang
  • ULTRA HIGH VOLTAGE MOS TRANSISTOR DEVICE
    Publication number: 20120091526
    Abstract: An ultra high voltage MOS transistor device includes a substrate having a first conductivity type and a first recess formed thereon, a gate positioned on the first recess, and a pair of source region and drain region having a second conductivity type formed in two sides of the gate, respectively.
    Type: Application
    Filed: December 29, 2011
    Publication date: April 19, 2012
    Inventors: Sung-Nien Tang, Sheng-Hsiong Yang
  • Ultra high voltage MOS transistor device
    Patent number: 8115253
    Abstract: An ultra high voltage MOS transistor device includes a substrate having a first conductive type, a first well having a second conductive type and a second well having the first conductive type formed in the substrate, a drain region having the second conductive type formed in the first well, a source region having the second conductive type formed in the second well, a first doped region having the first conductive type formed between the second well and the substrate, an insulating layer formed in a first recess in the first well, a gate formed on the substrate between the source region and the first well, and a recessed channel region formed in the substrate underneath the gate.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: February 14, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Sung-Nien Tang, Sheng-Hsiong Yang
  • ULTRA HIGH VOLTAGE MOS TRANSISTOR DEVICE
    Publication number: 20110057263
    Abstract: An ultra high voltage MOS transistor device includes a substrate having a first conductive type, a first well having a second conductive type and a second well having the first conductive type formed in the substrate, a drain region having the second conductive type formed in the first well, a source region having the second conductive type formed in the second well, a first doped region having the first conductive type formed between the second well and the substrate, an insulating layer formed in a first recess in the first well, a gate formed on the substrate between the source region and the first well, and a recessed channel region formed in the substrate underneath the gate.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 10, 2011
    Inventors: Sung-Nien Tang, Sheng-Hsiong Yang