Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a fin positioned on the substrate, a gate structure positioned on the fin, a pair of source/drain regions positioned on two sides of the fin, a dielectric layer positioned above the drain region and adjacent to the gate structure, and a storage conductive layer positioned on the dielectric layer. The drain region, the dielectric layer and the storage conductive layer form a storage structure.

Abstract: A semiconductor device structure includes a silicon layer disposed over a first semiconductor die, and a first mask layer disposed over the silicon layer. The semiconductor device structure also includes a second semiconductor die disposed over the first mask layer, and a through silicon via penetrating through the silicon layer and the first mask layer. A bottom surface of the through silicon via is greater than a top surface of the through silicon via, and the top surface of the through silicon via is greater than a cross-section of the through silicon via between and parallel to the top surface and the bottom surface of the through silicon via.

Abstract: A semiconductor device structure includes a silicon layer disposed over a first semiconductor die, and a first mask layer disposed over the silicon layer. The semiconductor device structure also includes a second semiconductor die disposed over the first mask layer, and a through silicon via penetrating through the silicon layer and the first mask layer. A bottom surface of the through silicon via is greater than a top surface of the through silicon via, and the top surface of the through silicon via is greater than a cross-section of the through silicon via between and parallel to the top surface and the bottom surface of the through silicon via.

Abstract: A contact structure and a manufacturing method are provided. The contact structure includes a recessed structure, a conductive feature, a first functional layer, a second functional layer and an interfacial layer. The conductive feature is filled in a recess of the recessed structure. The first functional layer extends between the conductive feature and the recessed structure. The second functional layer extends between the first functional layer and the conductive feature. The interfacial extends along an interface between the first and second functional layers, and includes a first element from the first functional layer and a second element from the second functional layer.

Abstract: A method for preparing a semiconductor device structure is provided. The method includes forming a target layer over a semiconductor substrate, and forming an energy-sensitive layer over the target layer. The method also includes performing an energy treating process on the energy-sensitive layer to transform a portion of the energy-sensitive layer into a treated portion. An untreated portion of the energy-sensitive layer is surrounded by the treated portion. The method further includes removing the treated portion, and transferring a pattern of the untreated portion of the energy-sensitive layer to the target layer such that the semiconductor substrate is exposed.

Abstract: A bevel etching method includes forming a target layer over a semiconductor substrate, and forming an energy-sensitive layer over the target layer. The method also includes performing an energy treating process to form a treated portion in the energy-sensitive layer. The treated portion is in a peripheral region. The method further includes removing the treated portion such that a remaining portion of the energy-sensitive layer is in a central region surrounded by the peripheral region, and transferring a pattern of the remaining portion of the energy-sensitive layer to the target layer.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a fin positioned on the substrate, a gate structure positioned on the fin, a pair of source/drain regions positioned on two sides of the fin, a dielectric layer positioned above the drain region and adjacent to the gate structure, and a storage conductive layer positioned on the dielectric layer. The drain region, the dielectric layer and the storage conductive layer form a storage structure.

Abstract: The present disclosure provides a method for forming a semiconductor device with an air gap for reducing the parasitic capacitance between two conductive features. The method includes forming a first source/drain region and a second source/drain region in a semiconductor substrate, and forming a first conductive feature over and electrically connected to the first source/drain region. The method also includes forming a first spacer structure on a sidewall of the first conductive feature, and forming a second conductive feature over and electrically connected to the second source/drain region. The second conductive feature is adjacent to the first spacer structure, and the first spacer structure is etched during the forming the second conductive feature. The method further includes forming a second spacer structure over the etched first spacer structure, and performing a heat treatment process to transform a portion of the first spacer structure into an air gap.

Abstract: The present disclosure provides a method for forming a semiconductor device with an air gap for reducing the parasitic capacitance between two conductive features. The method includes forming a first source/drain region and a second source/drain region in a semiconductor substrate, and forming a first conductive feature over and electrically connected to the first source/drain region. The method also includes forming a first spacer structure on a sidewall of the first conductive feature, and forming a second conductive feature over and electrically connected to the second source/drain region. The second conductive feature is adjacent to the first spacer structure, and the first spacer structure is etched during the forming the second conductive feature. The method further includes forming a second spacer structure over the etched first spacer structure, and performing a heat treatment process to transform a portion of the first spacer structure into an air gap.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a fin positioned on the substrate, a gate structure positioned on the fin, a pair of source/drain regions positioned on two sides of the fin, a dielectric layer positioned above the drain region and adjacent to the gate structure, and a storage conductive layer positioned on the dielectric layer. The drain region, the dielectric layer and the storage conductive layer form a storage structure.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes two gate structures, a first conductor, a barrier, a second conductor and a plurality of air gaps. The two gate structures are located on a surface of a semiconductor material substrate. The first conductor is disposed between the two gates structures. The barrier is disposed between the first conductor and the gate structure. The second conductor is disposed on the first conductor. The air gaps are disposed at two sides of the second conductor. A width of the second conductor is greater than a width of the first conductor.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes two gate structures, a first conductor, a barrier, a second conductor and a plurality of air gaps. The two gate structures are located on a surface of a semiconductor material substrate. The first conductor is disposed between the two gates structures. The barrier is disposed between the first conductor and the gate structure. The second conductor is disposed on the first conductor. The air gaps are disposed at two sides of the second conductor. A width of the second conductor is greater than a width of the first conductor.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a fin positioned on the substrate, a gate structure positioned on the fin, a pair of source/drain regions positioned on two sides of the fin, a dielectric layer positioned above the drain region and adjacent to the gate structure, and a storage conductive layer positioned on the dielectric layer. The drain region, the dielectric layer and the storage conductive layer form a storage structure.

Abstract: One aspect of the present disclosure provides a memory structure, including a substrate having at least one fin; a gate stack across the at least one fin; a first strained layer disposed at a first side of the gate; a second strained layer disposed at a second side of the gate; a bit line contact structure electrically connected to the first strained layer; and a capacitor contact electrically connected to the second strained layer. The memory structure further includes a capacitor electrically connected to the second strained layer via the capacitor contact. The memory structure further includes a bit line electrically connected to the first strained layer via the bit line contact structure.

Abstract: A method includes receiving a first optical signal at a first communication terminal from a second communication terminal through a free space optical link. The received optical signal contains a modulated unique frequency tone. The method also includes mixing the modulated unique frequency tone with a reference signal to provide a mixed output signal and determining a signal strength of the modulated unique frequency tone based on the mixed output signal. The reference signal includes a same frequency as the modulated unique frequency tone. The method adjusts an optical head of the first communication terminal to establish acquisition and optical beam pointing with the second communication terminal based on the signal strength of the modulated unique frequency tone received from the second communication terminal.

Abstract: A method includes receiving a first optical signal at a first communication terminal from a second communication terminal through a free space optical link. The received optical signal contains a modulated unique frequency tone. The method also includes mixing the modulated unique frequency tone with a reference signal to provide a mixed output signal and determining a signal strength of the modulated unique frequency tone based on the mixed output signal. The reference signal includes a same frequency as the modulated unique frequency tone. The method adjusts an optical head of the first communication terminal to establish acquisition and optical beam pointing with the second communication terminal based on the signal strength of the modulated unique frequency tone received from the second communication terminal.

Abstract: A method includes receiving an optical signal through an optical link and determining a receiving power for the optical link. The method further includes comparing the receiving power for the optical link to a first receiving power threshold and transitioning a clock and data recovery circuit form a normal mode to a holdover mode when the receiving power is less than the first receiving power threshold. The clock and data recovery circuit, when operating in the holdover mode, configured to hold a recovered clock to a known-good clock frequency. When the receiving power for the optical link is greater than a second receiving power threshold, the method initiates a transition of the clock and data recovery circuit from the holdover mode to the normal mode and reacquires synchronization between the recovered clock and a current rate of the incoming data stream using the known-good clock frequency.

Abstract: A method includes receiving a first optical signal at a first communication terminal from a second communication terminal through a free space optical link. The received optical signal contains a modulated unique frequency tone. The method also includes mixing the modulated unique frequency tone with a reference signal to provide a mixed output signal and determining a signal strength of the modulated unique frequency tone based on the mixed output signal. The reference signal includes a same frequency as the modulated unique frequency tone. The method adjusts an optical head of the first communication terminal to establish acquisition and optical beam pointing with the second communication terminal based on the signal strength of the modulated unique frequency tone received from the second communication terminal.

Abstract: A method includes receiving an optical signal through an optical link and determining a receiving power for the optical link. The method further includes comparing the receiving power for the optical link to a first receiving power threshold and transitioning a clock and data recovery circuit form a normal mode to a holdover mode when the receiving power is less than the first receiving power threshold. The clock and data recovery circuit, when operating in the holdover mode, configured to hold a recovered clock to a known-good clock frequency. When the receiving power for the optical link is greater than a second receiving power threshold, the method initiates a transition of the clock and data recovery circuit from the holdover mode to the normal mode and reacquires synchronization between the recovered clock and a current rate of the incoming data stream using the known-good clock frequency.

Abstract: A method includes receiving a first optical signal at a first communication terminal from a second communication terminal through a free space optical link. The received optical signal contains a modulated unique frequency tone. The method also includes mixing the modulated unique frequency tone with a reference signal to provide a mixed output signal and determining a signal strength of the modulated unique frequency tone based on the mixed output signal. The reference signal includes a same frequency as the modulated unique frequency tone. The method adjusts an optical head of the first communication terminal to establish acquisition and optical beam pointing with the second communication terminal based on the signal strength of the modulated unique frequency tone received from the second communication terminal.