Abstract: A round-trip time (RTT) evaluation system includes sending, by a first device, a plurality of packets to a second device on a path, where each of the packets carries a timestamp indicating a sending time of a corresponding packet, determining, by the second device based on a statistical value of one-way delays (OWDs) of the packets, timestamps carried in the packets, sending, by the second device, an acknowledgements (ACKs) to the first device, where the ACKs include the timestamps and ACK time information, and determining, by the first device, measurement values of an RTT of the path based on the timestamps, the ACK time information, and times when the ACKs are received.

Abstract: A path planning method, system, and device for autonomous driving are provided, where the method includes: acquiring environment perception information and vehicle positioning and navigation information, where the environment perception information includes obstacle information, roadside information, and lane line information, and the vehicle positioning and navigation information includes a vehicle pose and a target route; generating sub-paths according to the environment perception information and the vehicle positioning and navigation information, to obtain candidate sub-paths meeting vehicle constraints; performing a collision detection on the candidate sub-paths meeting the vehicle constraints, to obtain collision-free candidate sub-paths; performing a sub-path search on the collision-free candidate sub-paths by using an A* search algorithm; and obtaining, according to a result of the sub-path search, a local path of a vehicle.

Abstract: Provided are a method, apparatus and system for detecting obstacle collision in an automatic parking path. The method includes: geometrically performing an obstacle collision detection in a circular arc path and/or an obstacle collision detection in a straight line path by using a path contour, a vehicle contour and an obstacle contour. The system includes a collision detection module for geometrically performing detection of obstacle collision in a circular arc path and/or detection of obstacle collision in a straight line path by using a path contour, a vehicle contour and an obstacle contour. The apparatus includes: a memory and a processor configured for geometrically performing detection of obstacle collision in a circular arc path and/or detection of obstacle collision in a straight line path by using a path contour, a vehicle contour and an obstacle contour.

Abstract: The technology of this application relates to an acknowledgement packet processing method, a communications apparatus, and a storage medium, to reduce an ACK sending frequency and improve data transmission efficiency. The acknowledgement packet processing method is applied to a first communications apparatus, and the method includes generating a first ACK packet based on an acknowledgement ACK mechanism supported by the first communications apparatus, where the ACK mechanism is used to indicate N ACK types corresponding to N ACK packets, a trigger condition required for sending each of the N ACK packets, and feedback information carried in each of the N ACK packets, the first ACK packet is one of the N ACK packets, and N is a positive integer greater than or equal to 2. The method further includes sending the first ACK packet to a second communications apparatus.

Abstract: A round-trip time (RTT) evaluation system includes sending, by a first device, a plurality of packets to a second device on a path, where each of the packets carries a timestamp indicating a sending time of a corresponding packet, determining, by the second device based on a statistical value of one-way delays (OWDs) of the packets, timestamps carried in the packets, sending, by the second device, an acknowledgements (ACKs) to the first device, where the ACKs include the timestamps and ACK time information, and determining, by the first device, measurement values of an RTT of the path based on the timestamps, the ACK time information, and times when the ACKs are received.

Abstract: A path planning method, system, and device for autonomous driving are provided, where the method includes: acquiring environment perception information and vehicle positioning and navigation information, where the environment perception information includes obstacle information, roadside information, and lane line information, and the vehicle positioning and navigation information includes a vehicle pose and a target route; generating sub-paths according to the environment perception information and the vehicle positioning and navigation information, to obtain candidate sub-paths meeting vehicle constraints; performing a collision detection on the candidate sub-paths meeting the vehicle constraints, to obtain collision-free candidate sub-paths; performing a sub-path search on the collision-free candidate sub-paths by using an A* search algorithm; and obtaining, according to a result of the sub-path search, a local path of a vehicle.

Abstract: Provided are a method, apparatus and system for detecting obstacle collision in an automatic parking path. The method includes: geometrically performing an obstacle collision detection in a circular arc path and/or an obstacle collision detection in a straight line path by using a path contour, a vehicle contour and an obstacle contour. The system includes a collision detection module for geometrically performing detection of obstacle collision in a circular arc path and/or detection of obstacle collision in a straight line path by using a path contour, a vehicle contour and an obstacle contour. The apparatus includes: a memory and a processor configured for geometrically performing detection of obstacle collision in a circular arc path and/or detection of obstacle collision in a straight line path by using a path contour, a vehicle contour and an obstacle contour.

Abstract: A control circuit for an interleaved switching power supply having a plurality of parallel coupled power stage circuits, can include: a feedback circuit that receives an output voltage of the interleaved switching power supply, and generates an output voltage feedback signal; a ripple generator that receives a plurality of switching control signals, and generates an AC ripple signal having a frequency that is N times a switching frequency; an adder circuit that adds the output voltage feedback signal with the AC ripple signal, and generates a superposition signal; a comparison circuit that receives the superposition signal and a reference voltage, and generates a comparison signal; and a frequency divider circuit that divides the comparison signal into a plurality of turn on control signals configured to control turn on of a plurality of main power switches in the plurality of power stage circuits.

Abstract: A control circuit for an interleaved switching power supply having a plurality of parallel coupled power stage circuits, can include: a feedback circuit that receives an output voltage of the interleaved switching power supply, and generates an output voltage feedback signal; a ripple generator that receives a plurality of switching control signals, and generates an AC ripple signal having a frequency that is N times a switching frequency; an adder circuit that adds the output voltage feedback signal with the AC ripple signal, and generates a superposition signal; a comparison circuit that receives the superposition signal and a reference voltage, and generates a comparison signal; and a frequency divider circuit that divides the comparison signal into a plurality of turn on control signals configured to control turn on of a plurality of main power switches in the plurality of power stage circuits.

Abstract: A control circuit for an interleaved switching power supply having a plurality of parallel coupled power stage circuits, can include: a feedback circuit that receives an output voltage of the interleaved switching power supply, and generates an output voltage feedback signal; a ripple generator that receives a plurality of switching control signals, and generates an AC ripple signal having a frequency that is N times a switching frequency; an adder circuit that adds the output voltage feedback signal with the AC ripple signal, and generates a superposition signal; a comparison circuit that receives the superposition signal and a reference voltage, and generates a comparison signal; and a frequency divider circuit that divides the comparison signal into a plurality of turn on control signals configured to control turn on of a plurality of main power switches in the plurality of power stage circuits.

Abstract: A control circuit for an interleaved switching power supply having a plurality of parallel coupled power stage circuits, can include: a feedback circuit that receives an output voltage of the interleaved switching power supply, and generates an output voltage feedback signal; a ripple generator that receives a plurality of switching control signals, and generates an AC ripple signal having a frequency that is N times a switching frequency; an adder circuit that adds the output voltage feedback signal with the AC ripple signal, and generates a superposition signal; a comparison circuit that receives the superposition signal and a reference voltage, and generates a comparison signal; and a frequency divider circuit that divides the comparison signal into a plurality of turn on control signals configured to control turn on of a plurality of main power switches in the plurality of power stage circuits.