Patents by Inventor Sheng LEI

Sheng LEI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9018079
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the mask, the exposed regions of the semiconductor wafer are cleaned with a plasma process reactive to the exposed regions of the semiconductor wafer. Subsequent to cleaning the exposed regions of the semiconductor wafer, the semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: April 28, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20150111364
    Abstract: Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.
    Type: Application
    Filed: August 7, 2014
    Publication date: April 23, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, James S. Papanu, Ajay Kumar
  • Publication number: 20150111363
    Abstract: Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.
    Type: Application
    Filed: October 22, 2013
    Publication date: April 23, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, James S. Papanu, Ajay Kumar
  • Patent number: 9012305
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the mask, the exposed regions of the semiconductor wafer are cleaned with an anisotropic plasma process non-reactive to the exposed regions of the semiconductor wafer. Subsequent to cleaning the exposed regions of the semiconductor wafer, the semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: April 21, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Jungrae Park, James S. Papanu, Brad Eaton, Ajay Kumar
  • Publication number: 20150102467
    Abstract: Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.
    Type: Application
    Filed: December 18, 2014
    Publication date: April 16, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Saravjeet Singh, Todd Egan, Ajay Kumar, Seshadri Ramaswami
  • Publication number: 20150104929
    Abstract: Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a front surface having a plurality of integrated circuits thereon involves forming a mask layer above the front surface of the semiconductor wafer. The method also involves laser scribing the mask layer and the front surface of the semiconductor wafer to provide scribe lines in the mask layer and partially into the semiconductor wafer. The laser scribing involves use of a dual focus lens to provide a dual focus spot beam. The method also involves etching the semiconductor wafer through the scribe lines to singulate the integrated circuits.
    Type: Application
    Filed: December 11, 2013
    Publication date: April 16, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, Ajay Kumar
  • Patent number: 8991329
    Abstract: Improved wafer coating processes, apparatuses, and systems are described. In one embodiment, an improved spin-coating process and system is used to form a mask for dicing a semiconductor wafer with a laser plasma dicing process. In one embodiment, a spin-coating apparatus for forming a film over a semiconductor wafer includes a rotatable stage configured to support the semiconductor wafer. The rotatable stage has a downward sloping region positioned beyond a perimeter of the semiconductor wafer. The apparatus includes a nozzle positioned above the rotatable stage and configured to dispense a liquid over the semiconductor wafer. The apparatus also includes a motor configured to rotate the rotatable stage.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: March 31, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Jungrae Park, Wei-Sheng Lei, Prabhat Kumar, James S. Papanu, Brad Eaton, Ajay Kumar
  • Patent number: 8993414
    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: March 31, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Brad Eaton, Saravjeet Singh, Wei-Sheng Lei, Madhava Rao Yalamanchili, Tong Liu, Ajay Kumar
  • Publication number: 20150079761
    Abstract: Approaches for backside laser scribe plus front side laser scribe and plasma etch dicing of a wafer or substrate are described. For example, a method of dicing a semiconductor wafer having a plurality of integrated circuits on a front side thereof and metallization on a backside thereof involves patterning the metallization on the backside with a first laser scribing process to provide a first plurality of laser scribe lines on the backside. The method also involves forming a mask on the front side. The method also involves patterning, from the front side, the mask with a second laser scribing process to provide a patterned mask with a second plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits, wherein the second plurality of scribe lines is aligned with the first plurality of scribe lines. The method also involves plasma etching the semiconductor wafer through the second plurality of scribe lines to singulate the integrated circuits.
    Type: Application
    Filed: December 11, 2013
    Publication date: March 19, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, Ajay Kumar
  • Publication number: 20150079760
    Abstract: Alternating masking and laser scribing approaches for wafer dicing using laser scribing and plasma etch are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits includes forming a first mask above the semiconductor wafer. The first mask is patterned with a first laser scribing process to provide a patterned first mask with a first plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the first mask with the first laser scribing process, a second mask is formed above the patterned first mask. The second mask is patterned with a second laser scribing process to provide a patterned second mask with a second plurality of scribe lines exposing regions of the semiconductor wafer between the integrated circuits. The second plurality of scribe lines is aligned with and overlaps the first plurality of scribe lines.
    Type: Application
    Filed: December 11, 2013
    Publication date: March 19, 2015
    Inventors: Wei-Sheng Lei, Ajay Kumar, Brad Eaton
  • Patent number: 8980727
    Abstract: Approaches for patterning semiconductor or other wafers and dies are described. For example, a method of patterning features within a substrate involves forming a mask layer above a surface of a semiconductor or glass substrate. The method also involves laser ablating the mask layer to provide a pattern of openings through the mask layer. The method also involves plasma etching portions of the semiconductor or glass substrate through the pattern of openings to provide a plurality of trenches in the semiconductor or glass substrate. The plurality of trenches has a pattern corresponding to the pattern of openings and comprising a pattern of through-substrate-via openings or redistribution layer (RDL) openings. The method also involves, subsequent to the plasma etching, removing the mask layer.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Ajay Kumar
  • Patent number: 8980726
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask, patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps, and ablating through an entire thickness of a semiconductor substrate to singulate the IC. Following laser-based singulation, a plasma etch is performed to remove a layer of semiconductor sidewall damaged by the laser scribe process. In the exemplary embodiment, a femtosecond laser is utilized and a 1-3 ?m thick damage layer is removed with the plasma etch. Following the plasma etch, the mask is removed, rendering the singulated die suitable for assembly/packaging.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Aparna Iyer, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 8975163
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer comprising a plurality of integrated circuits involves forming a mask above the semiconductor wafer. The mask includes a layer covering and protecting the integrated circuits. The semiconductor wafer has a thickness. The method also involves laser scribing the mask and a majority of the thickness of the semiconductor wafer to provide scribe lines in the mask and the semiconductor wafer. The scribe lines are formed between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: March 10, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, James S. Papanu, Brad Eaton, Ajay Kumar
  • Patent number: 8975162
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: March 10, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Saravjeet Singh, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20150064878
    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.
    Type: Application
    Filed: November 26, 2013
    Publication date: March 5, 2015
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Wei-Sheng LEI, Brad EATON, Aparna IYER, Madhava Rao YALAMANCHILI, Ajay KUMAR, Jungrae PARK
  • Patent number: 8969177
    Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: March 3, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 8951819
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a split-beam laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: February 10, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, Aparna Iyer
  • Publication number: 20150037915
    Abstract: In embodiments, a method of laser scribing a mask disposed over a semiconductor wafer includes determining a height of the semiconductor over which a mask layer is disposed prior to laser scribing the mask layer. In one embodiment the method includes: determining a height of the semiconductor wafer under the mask in a dicing street using an optical sensor and patterning the mask with a laser scribing process. The laser scribing process focuses a scribing laser beam at a plane corresponding to the determined height of the semiconductor wafer in the dicing street. Examples of determining the height of the semiconductor wafer can include directing a laser beam to the dicing street of the semiconductor wafer, which is transmitted through the mask and reflected from the wafer, and identifying an image on a surface of the wafer under the mask with a camera.
    Type: Application
    Filed: September 24, 2013
    Publication date: February 5, 2015
    Inventors: Wei-Sheng LEI, Brad Eaton, Apama IYER, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 8946057
    Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films is described. In an example, a method includes forming a mask above the semiconductor wafer. The semiconductor wafer is coupled to a carrier substrate by a UV-curable adhesive film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The UV-curable adhesive film is then irradiated with ultra-violet (UV) light. The singulated integrated circuits are then detached from the carrier substrate.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: February 3, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Mohammad K. Chowdhury, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20150028446
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: October 13, 2014
    Publication date: January 29, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Madhava Rao Yalamanchili, Ajay Kumar