Patents by Inventor Sheng-Liang Lin

Sheng-Liang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12243848
    Abstract: Methods and systems for improving fusion bonding are disclosed. Plasma treatment is performed on a substrate prior to the fusion bonding, which leaves residual charge on the substrate to be fusion bonded. The residual charge is usually dissipated through an electrically conductive silicone cushion on a loading pin. In the methods, the amount of residual voltage on a test silicon wafer is measured. If the residual voltage is too high, this indicates the usable lifetime of the silicone cushion has passed, and the electrically conductive silicone cushion is replaced. This ensures the continued dissipation of residual charge during use in production, improving the quality of fusion bonds between substrates.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hong-Ta Kuo, Yen Hao Huang, I-Shi Wang, Ming-Yi Shen, Tzu-Ping Yang, Hsing-Yu Wang, Huang-Liang Lin, Yin-Tung Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
  • Patent number: 12237228
    Abstract: An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas.
    Type: Grant
    Filed: June 30, 2023
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shao-Jyun Wu, Hung-Chi Wu, Chia-Ching Lee, Pin-Hsuan Yeh, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen, Sheng-Liang Pan, Huan-Just Lin
  • Patent number: 12213323
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first and second transistors arranged over a substrate. The first transistor includes first channel structures extending between first and second source/drain regions. A first gate electrode is arranged between the first channel structures, and a first protection layer is arranged over a topmost one of the first channel structures. The second transistor includes second channel structures extending between the second source/drain region and a third source/drain region. A second gate electrode is arranged between the second channel structures, and a second protection layer is arranged over a topmost one of the second channel structures. The integrated chip further includes a first interconnect structure arranged between the substrate and the first and second channel structures, and a contact plug structure coupled to the second source/drain region and arranged above the first and second gate electrodes.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Liang Liu, Sheng-Chau Chen, Chung-Liang Cheng, Chia-Shiung Tsai, Yeong-Jyh Lin, Pinyen Lin, Huang-Lin Chao
  • Patent number: 12205816
    Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Chuan Wang, Guan-Xuan Chen, Chia-Yang Hung, Sheng-Liang Pan, Huan-Just Lin
  • Patent number: 11209942
    Abstract: A method for manufacturing capacitive touch control panel and a capacitive touch control panel are provided. The method includes forming a sensing circuit on a substrate and then forming a communicating structure on the substrate. The communicating structure is conductive, and is disposed to be near at least two adjacent side walls of the substrate. A gap is formed between the communicating structure and the plurality of the sensing electrodes that are near the communicating structure. The next step is to form a plurality of bridging structures for connecting the plurality of the sensing electrodes and the communicating structure. The last step is to remove a portion of the communicating structure by laser cutting to form a plurality of output cables.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: December 28, 2021
    Assignee: HIGGSTEC INC.
    Inventors: Chun-Wei Yeh, Sheng-Liang Lin, Yi-Han Wang, Hung-Yu Tsai
  • Publication number: 20210019002
    Abstract: A method for manufacturing capacitive touch control panel and a capacitive touch control panel are provided. The method includes forming a sensing circuit on a substrate and then forming a communicating structure on the substrate. The communicating structure is conductive, and is disposed to be near at least two adjacent side walls of the substrate. A gap is formed between the communicating structure and the plurality of the sensing electrodes that are near the communicating structure. The next step is to form a plurality of bridging structures for connecting the plurality of the sensing electrodes and the communicating structure. The last step is to remove a portion of the communicating structure by laser cutting to form a plurality of output cables.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: CHUN-WEI YEH, SHENG-LIANG LIN, YI-HAN WANG, HUNG-YU TSAI
  • Patent number: 10802638
    Abstract: A touch display device includes a display module, a touch module and a light-transmitting substrate. The display module has a display surface and a bottom surface opposite to the display surface. The touch module is fixed to the display surface by an adhesive. The adhesive, the touch module and the display surface jointly define an accommodating space between the display module and the touch module. The light-transmitting substrate is disposed in the accommodating space. One side of the light-transmitting substrate is fixed to the display surface by a first optical adhesive, and the other side of the light-transmitting substrate is fixed to the touch module by a second optical adhesive. An adhesive strength of the adhesive is higher than an adhesive strength of the first optical adhesive, and the adhesive strength of the adhesive is higher than an adhesive strength of the second optical adhesive.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: October 13, 2020
    Assignee: HIGGSTEC INC.
    Inventors: Chun-Wei Yeh, Sheng-Liang Lin, Yi-Han Wang, Hung-Yu Tsai