Abstract: The present disclosure discloses an image processing apparatus having lens color-shading correction mechanism. A first and a second calibration circuits perform lens color-shading correction on an input image according to a first and a second calibration parameters to generate a first and a second calibrated images. A first and a second statistic circuits perform statistic on the first and the second calibrated images to generate a first and a second statistic results.

Abstract: An input-shaping method for a group-modulated input scheme in a plurality of computing-in-memory applications is configured to shape a plurality of multi-bit input signals. The input-shaping method for the group-modulated input scheme in the plurality of computing-in-memory applications includes performing an input splitting step, a threshold setting step and an input shaping step. The input splitting step includes splitting the multi-bit input signals into a plurality of input sub-groups via an input-shaping unit. The threshold setting step includes setting at least one shaping threshold via the input-shaping unit. The input shaping step includes shaping at least one of the input sub-groups according to the at least one shaping threshold via the input-shaping unit to form a plurality of shaped multi-bit input signals so as to increase a probability of a bit equal to 0 occurring in the at least one of the input sub-groups.

Abstract: An input-shaping method for a group-modulated input scheme in a plurality of computing-in-memory applications is configured to shape a plurality of multi-bit input signals. The input-shaping method for the group-modulated input scheme in the plurality of computing-in-memory applications includes performing an input splitting step, a threshold setting step and an input shaping step. The input splitting step includes splitting the multi-bit input signals into a plurality of input sub-groups via an input-shaping unit. The threshold setting step includes setting at least one shaping threshold via the input-shaping unit. The input shaping step includes shaping at least one of the input sub-groups according to the at least one shaping threshold via the input-shaping unit to form a plurality of shaped multi-bit input signals so as to increase a probability of a bit equal to 0 occurring in the at least one of the input sub-groups.

Abstract: A memory unit with an asymmetric group-modulated input scheme and a current-to-voltage signal stacking scheme for a plurality of non-volatile computing-in-memory applications is configured to compute a plurality of multi-bit input signals and a plurality of weights. A controller splits the multi-bit input signals into a plurality of input sub-groups and generates a plurality of switching signals according to the input sub-groups, and the input sub-groups are sequentially inputted to the word lines. The current-to-voltage signal stacking converter converts the bit-line current from a plurality of non-volatile memory cells into a plurality of converted voltages according to the input sub-groups and the switching signals, and the current-to-voltage signal stacking converter stacks the converted voltages to form an output voltage. The output voltage is corresponding to a sum of a plurality of multiplication values which are equal to the multi-bit input signals multiplied by the weights.

Abstract: A memory unit with an asymmetric group-modulated input scheme and a current-to-voltage signal stacking scheme for a plurality of non-volatile computing-in-memory applications is configured to compute a plurality of multi-bit input signals and a plurality of weights. A controller splits the multi-bit input signals into a plurality of input sub-groups and generates a plurality of switching signals according to the input sub-groups, and the input sub-groups are sequentially inputted to the word lines. The current-to-voltage signal stacking converter converts the bit-line current from a plurality of non-volatile memory cells into a plurality of converted voltages according to the input sub-groups and the switching signals, and the current-to-voltage signal stacking converter stacks the converted voltages to form an output voltage. The output voltage is corresponding to a sum of a plurality of multiplication values which are equal to the multi-bit input signals multiplied by the weights.

Abstract: A memory unit with multiple word lines for a plurality of non-volatile computing-in-memory applications is configured to compute a plurality of input signals and a plurality of weights. The memory unit includes a non-volatile memory cell array, a replica non-volatile memory cell array and a multi-row current calibration circuit. The non-volatile memory cell array is configured to generate a bit-line current. The replica non-volatile memory cell array includes a plurality of replica non-volatile memory cells and is configured to generate a calibration current. Each of the replica non-volatile memory cells is in the high resistance state. The multi-row current calibration circuit is electrically connected to the non-volatile memory cell array and the replica non-volatile memory cell array. The multi-row current calibration circuit is configured to subtract the calibration current from a dataline current to generate a calibrated dataline current. The dataline current is equal to the bit-line current.

Abstract: A [F-18]FEONM precursor is synthesized. 2-bromoethanol is added to further connect an atom of oxygen at an N terminal of the precursor. Four atoms of carbon can be further connected. Thus, better fat-solubility is obtained along with the increase in carbon. Positioning in brain imaging becomes better.