Patents by Inventor Sheng-Tai Tsai

Sheng-Tai Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080179739
    Abstract: A flip chip package with an anti-floating structure includes a leadframe, a flip chip, and a plurality of solders. The leadframe includes a plurality of leads and a fastening part. At least one locking hole is formed on an upper surface of the fastening part. The flip chip includes an active surface, and at least one locking protrusion and a plurality of bumps formed on the active surface. The locking protrusion is correspondingly plugged into the locking hole to act as an anti-floating structure for the flip chip package. When the solders are used for connecting the bumps with the leads by reflowing, the anti-floating structure will prevent the flip chip from floating up, and the solders will not generate necking after reflowing.
    Type: Application
    Filed: March 31, 2008
    Publication date: July 31, 2008
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien Liu, Meng-Jen Wang, Sheng-Tai Tsai
  • Patent number: 7368806
    Abstract: A flip chip package with an anti-floating structure includes a leadframe, a flip chip, and a plurality of solders. The leadframe includes a plurality of leads and a fastening part. At least one locking hole is formed on an upper surface of the fastening part. The flip chip includes an active surface, and at least one locking protrusion and a plurality of bumps formed on the active surface. The locking protrusion is correspondingly plugged into the locking hole to act as an anti-floating structure for the flip chip package. When the solders are used for connecting the bumps with the leads by reflowing, the anti-floating structure will prevent the flip chip from floating up, and the solders will not generate necking after reflowing.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: May 6, 2008
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien Liu, Meng-Jen Wang, Sheng-Tai Tsai
  • Publication number: 20060125113
    Abstract: A flip chip package with an anti-floating structure comprises a leadframe, a flip chip, and a plurality of solders. The leadframe comprises a plurality of leads and a fastening part. At least one locking hole is formed on an upper surface of the fastening part. The flip chip comprises an active surface, and at least one locking protrusion and a plurality of bumps formed on the active surface. The locking protrusion is correspondingly plugged into the locking hole to act as an anti-floating structure for the flip chip package. When the solders are used for connecting the bumps with the leads by reflowing, the anti-floating structure will prevent the flip chip from floating up, and the solders will not generate necking after reflowing.
    Type: Application
    Filed: December 8, 2005
    Publication date: June 15, 2006
    Inventors: Chien Liu, Meng-Jen Wang, Sheng-Tai Tsai
  • Publication number: 20060084202
    Abstract: A wafer level process for fabricating leadframes is disclosed. A first mask is formed over an active surface of a wafer. The first mask includes a plurality of openings aligned with the wafer electrodes for forming a plurality of first leads on the wafer. A second mask is formed over the first mask with a plurality of grooves for forming a plurality of second leads. The second leads are connected to the corresponding first leads to form a leadframe. Next, the first mask and the second mask are removed to expose the active surface of the wafer and the first and second leads. Next, an encapsulant is applied on the wafer to seal the first leads and portions of the second leads.
    Type: Application
    Filed: October 6, 2005
    Publication date: April 20, 2006
    Inventors: Chien Liu, Meng-Jen Wang, Sheng-Tai Tsai
  • Publication number: 20060084199
    Abstract: A processing method for preventing the lead fingers of a lead-frame from over-wetting and the conductive bumps from necking. After a flip chip is mounted to the lead fingers and before the reflowing process is conducted, the whole package structure is reversed so that conductive bumps are inclined to flow towards the chip during reflowing process.
    Type: Application
    Filed: October 14, 2005
    Publication date: April 20, 2006
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien Liu, Meng-Jen Wang, Sheng-Tai Tsai