Abstract: Various embodiments of the present disclosure are directed towards a shared frontside pad/bridge layout for a three-dimensional (3D) integrated circuit (IC), as well as the 3D IC and a method for forming the 3D IC. A second IC die underlies the first IC die, and a third IC die underlies the second IC die. A first-die backside pad, a second-die backside pad, and a third die backside pad are in a row extending in a dimension and overlie the first, second, and third IC dies. Further, the first-die, second-die, and third-die backside pads are electrically coupled respectively to individual semiconductor devices of the first, second, and third IC dies. The second and third IC dies include individual pad/bridge structures at top metal (TM) layers of corresponding interconnect structures. The pad/bridge structures share the shared frontside pad/bridge layout and provide lateral routing in the dimension for the aforementioned electrical coupling.

Abstract: A packaged integrated circuit including an input-output pin, a first chip and a second chip is provided. The first chip includes a first voltage converter circuit, a second voltage converter circuit, and a data transmission circuit. The first voltage converter circuit, the second voltage converter circuit, and the data transmission circuit are connected in parallel between an internal pin and the input-output pin. The second chip enables the first voltage converter circuit, the second voltage converter circuit, or the data transmission circuit based on the operation mode of the internal pin.

Abstract: An encoding, a decoding method, a system for encoding and decoding, an encoder, and a decoder are provided. The encoding method includes the following. In a palette mode, if colors of pixels of a coding unit block are all represented by one or more major colors of the coding unit block, a flag is set as a first state value, and if the color of at least one pixel of the coding unit block is not represented by the one or more major colors of the coding unit block, the flag is set as a second state value. The encoding method further includes establishing a palette table corresponding to the coding unit block according to a state value of the flag and the one or more major colors.

Abstract: An encoding, a decoding method, a system for encoding and decoding, an encoder, and a decoder are provided. The encoding method includes the following. In a palette mode, if colors of pixels of a coding unit block are all represented by one or more major colors of the coding unit block, a flag is set as a first state value, and if the color of at least one pixel of the coding unit block is not represented by the one or more major colors of the coding unit block, the flag is set as a second state value. The encoding method further includes establishing a palette table corresponding to the coding unit block according to a state value of the flag and the one or more major colors.

Abstract: A power transmission chip is coupled between an external converter circuit and a controller chip and includes a first transmitting interface, an internal converter circuit, a second transmitting interface, and a processing circuit. The first transmitting interface is coupled to the external converter circuit to receive a conversion voltage. The internal converter circuit processes the conversion voltage to generate an analog signal. The second transmitting interface transmits the analog signal to the controller chip and receives a control command from the controller chip. The processing circuit generates an adjustment signal based on the control command and provides the first adjustment signal to the external converter circuit via the first transmitting interface. The external converter circuit adjusts the conversion voltage based on the adjustment signal.

Abstract: A control chip providing power to a sink device and including a connection port, an encoder, a decoder, and a control circuit is provided. The connection port provides an output voltage and an inquiry signal to the sink device, and receives an acknowledgement signal provided by the sink device. The encoder generates the inquiry signal. The decoder decodes the acknowledgement signal to generate a decoded result. In a compensation mode, the control circuit obtains an actual voltage received by the sink device according to the decoded result and adjusts the output voltage according to the actual voltage received by the sink device. In a setting mode, the control circuit obtains a protect-point voltage of the sink device according to the decoded result and adjusts the output voltage according to the protect-point voltage of the sink device to prevent the output voltage from being higher than the protect-point voltage.

Abstract: A dynamic protection circuit including an adjustment circuit, a detection circuit, a control circuit, and a counter circuit is provided. The adjustment circuit adjusts an output voltage based on a predetermined value. The detection circuit detects whether the output voltage is higher than an upper-limit value or lower than a lower-limit value. The control circuit changes the predetermined value and disables the detection circuit while the predetermined value is being changed. The counter circuit starts to adjust a count value in response to the detection circuit being disabled. In response to the counter circuit adjusting the count value, the control circuit adjusts the upper-limit value and the lower-limit value to be proportional to the output voltage. In response to the count value being equal to a target value, the counter circuit enables the detection circuit.

Abstract: A control method executing a power-off detection operation is provided. An operation voltage provided by a power circuit is detected. In response to the operation voltage being equal to the first detection value, the count value is adjusted. In response to the operation voltage being equal to the second detection value, the first detection value, the second detection value, and the count value are calculated to generate a first slope. A first power-off speed at which the operation voltage drops to the reset voltage is estimated according to the first slope. In a test mode, the first power-off speed is output to a test machine. The test machine determines whether the power circuit is working normally according to the first power-off speed.

Abstract: A heating circuit is provided. The heating circuit is disposed in a chip which has a normal operation temperature range. The heating circuit includes a comparison circuit and a thermal-energy generation circuit. The comparison circuit compares a temperature voltage with a first threshold voltage. The temperature voltage represents a temperature of the chip. The thermal-energy generation circuit is controlled by the comparison circuit. When the temperature voltage is less than the first threshold voltage, the comparison circuit enables the thermal-energy generation circuit to generate thermal energy to raise the temperature of the chip.

Abstract: A touch detection circuit detects whether a key is being touched and includes a comparator, a compensation capacitor, and a voltage control circuit. The comparator includes an inverting input, a non-inverting input, and an output terminal. The compensation capacitor is coupled to the inverting input. The voltage control circuit provides an output voltage to the non-inverting input. In a calibration mode, the voltage control circuit adjusts the output voltage according to the voltage level of the output terminal.

Abstract: A control circuit including a storage circuit, a voltage detection circuit, a processing circuit, and a wake-up circuit is provided. The storage circuit includes a register and stores a program code. The voltage detection circuit detects an external voltage. The processing circuit accesses the register in response to the external voltage reaching a first predetermined voltage. The processing circuit enters a power-down mode in response to the external voltage reaching a second predetermined voltage. In the power-down mode, the processing circuit stops accessing the register. The wake-up circuit determines whether a wake-up event occurs. In response to the wake-up event, the wake-up circuit directs the processing circuit to exit the power-down mode and enter an operation mode. In response to there being no wake-up event, the processing circuit stays in the power-down mode. In the operation mode, the processing circuit executes the program code.

Abstract: A micro controller unit coupled between a master device and a slave device and including a first communication interface, a serial peripheral interface (SPI) circuit, a switch circuit, a second communication interface, and a switching control circuit is provided. The first communication interface receives a first external signal provided by the master device. The SPI circuit is configured to generate an internal signal. The switch circuit uses a second external signal or the internal signal as an output signal according to a control signal. The second communication interface provides the output signal to the slave device. The switching control circuit generates the control signal according to the level of the first external signal.

Abstract: An embodiment of the present disclosure provides an online integrated microcontroller development tool system. Through the present disclosure, a microcontroller block of a suitable model number is selected according to a client requirement, pins of the microcontroller may be arranged, the microcontroller block with the arranged have been pins is connected to a functional component selected by the client, a corresponding circuit structure is generated, and based on the circuit structure, a microcontroller system hardware description code is generated and output. Different from the conventional development platform, the present disclosure helps clients to develop microcontroller application circuits for different applications through a pin required module, a functional component module and a description code project output module. Thus, purposes of simple operation and saving development time can be achieved.

Abstract: Systems and methods for inspecting particles in a liquid beneficial agent are provided.

Abstract: An encoding, a decoding method, a system for encoding and decoding, an encoder, and a decoder are provided. The encoding method includes the following. In a palette mode, if colors of pixels of a coding unit block are all represented by one or more major colors of the coding unit block, a flag is set as a first state value, and if the color of at least one pixel of the coding unit block is not represented by the one or more major colors of the coding unit block, the flag is set as a second state value. The encoding method further includes establishing a palette table corresponding to the coding unit block according to a state value of the flag and the one or more major colors.

Abstract: An encoding, a decoding method, a system for encoding and decoding, an encoder, and a decoder are provided. The encoding method includes the following. In a palette mode, if colors of pixels of a coding unit block are all represented by one or more major colors of the coding unit block, a flag is set as a first state value, and if the color of at least one pixel of the coding unit block is not represented by the one or more major colors of the coding unit block, the flag is set as a second state value. The encoding method further includes establishing a palette table corresponding to the coding unit block according to a state value of the flag and the one or more major colors.

Abstract: An electronic device is provided. The electronic device includes a power pin, a main circuit, and a start-up circuit. The power pin is configured to receive a power supply. The start-up circuit includes a switch coupled between the power pin and the main circuit, a timer and an oscillator. The switch is configured to selectively provide the power supply to the main circuit in response to a control signal. The oscillator, is configured to provide a periodic signal. The timer is configured to provide the control signal to turn on the switch when counting to a start-up time according to the periodic signal, so that the main circuit is configured to provide a fixed voltage according to the power supply.

Abstract: An encoding, a decoding method, a system for encoding and decoding, an encoder, and a decoder are provided. The encoding method includes the following. In a palette mode, if colors of pixels of a coding unit block are all represented by one or more major colors of the coding unit block, a flag is set as a first state value, and if the color of at least one pixel of the coding unit block is not represented by the one or more major colors of the coding unit block, the flag is set as a second state value. The encoding method further includes establishing a palette table corresponding to the coding unit block according to a state value of the flag and the one or more major colors.

Abstract: A control circuit and method for detecting a glitch signal on a bus are provided. The control circuit includes: input ends, respectively receiving a data signal and a clock signal from the bus; a counter, for calculating a time or a number of times in a low level period of the clock signal; a comparator, receiving an output of the time counted by the counter and a threshold value, and generating a comparison result by comparing the time and the threshold value; and an error detector, coupled to the comparator to receive the comparison result, and generating an error flag. When the comparison result indicates that there is a level change during the low level period of the clock signal, the error detector generates an error flag.

Abstract: An IC is provided. The IC includes an input pin, a controller, a timer, a first memory, a processor, at least one output pin, an output module coupled to the output pin, and a direct memory access (DMA) device coupled between the output module and the first memory. The controller is configured to provide a first control signal in response to a command from the input pin. The timer is configured to periodically provide a trigger signal according to the first control signal. The processor is configured to store first data in the first memory. The DMA device is configured to obtain the first data from the first memory in response to the trigger signal, and transmit the first data to the output module. The output module is configured to provide the first data to the output pin according to a transmission rate.