Patents by Inventor Sheng Wang

Sheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240012754
    Abstract: The present application discloses techniques for adjusting cache memory. The techniques comprise determining running memory in a current time period; determining free memory in the current time period based on the running memory and preset reserved memory; determining a current memory queue length based on the free memory and a preset memory block size; determining whether the current memory queue length is less than an initial memory queue length, wherein the initial memory queue length is a memory queue length corresponding to cache memory configured to cache non-system application data in a memory unit; setting the current memory queue length as a new initial memory queue length when the current memory queue length is less than the initial memory queue length; and releasing one or more memory blocks in the cache memory corresponding to a length by which the cache memory exceeds the new initial memory queue length.
    Type: Application
    Filed: July 5, 2021
    Publication date: January 11, 2024
    Inventors: Sheng WANG, Shangzhi CAI
  • Publication number: 20230420818
    Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.
    Type: Application
    Filed: March 14, 2023
    Publication date: December 28, 2023
    Applicants: UNIMICRON TECHNOLOGY CORP., TUNGHAI UNIVERSITY
    Inventors: Chi-Feng CHEN, Po-Sheng YEN, Ruey-Beei WU, Ra-Min TAIN, Chin-Sheng WANG, Jun-Ho CHEN
  • Publication number: 20230422140
    Abstract: The present invention provides a method for optimizing the energy efficiency of wireless sensor network based on the assistance of unmanned aerial vehicle, firstly, collecting the state of the WSN through current routing scheme, and inputting the state of the WSN into the decision network of the agent to determine a next hover node; Secondly, based on the location of the next hover node, generating a new routing scheme by the UAV, and sending each sensor node's routing to its corresponding sensor node through current routing by the UAV; Lastly, after all sensor nodes have received their routings respectively, all sensor nodes send their collected data to the hover node through their routings respectively, and the UAV flies to and hovers above the next hover node to collect data through the next hover node, thus the data collection of the whole WSN is completed.
    Type: Application
    Filed: September 12, 2023
    Publication date: December 28, 2023
    Applicant: University of Electronic Science and Technology of China
    Inventors: Jing REN, Jianxin LIAO, Tongyu SONG, Chao SUN, Jiangong ZHENG, Xiaotong GUO, Sheng WANG, Shizhong XU, Xiong WANG
  • Publication number: 20230417836
    Abstract: A detection system and an operating method are provided. The detection system is used to estimate a degradation state of a battery device. The detection system includes a first operation circuit, a second operation circuit, and a processor. The first operation circuit receives voltage timing data of the battery device, and calculates a first reference value of the battery device according to the voltage timing data. The second operation circuit receives temperature timing data of the battery device, and calculates a second reference value of the battery device according to the temperature timing data. The processor provides state data related to the degradation state according to the first reference value and the second reference value.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 28, 2023
    Applicant: AMIDAS Energy CO., LTD.
    Inventor: Chin Sheng Wang
  • Patent number: 11855017
    Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Patent number: 11851704
    Abstract: A method for sequencing biopolymers. The method includes selecting with a sequence generator module an input nucleotide sequence having plural k-mers; simulating with a deep learning simulator, actual electrical current signals corresponding to the input nucleotide sequence; identifying reads that correspond to the actual electrical current signals; and displaying the reads. The deep learning simulator includes a context-dependent deep learning model that takes into consideration a position of a k-mer of the plural k-mers on the input nucleotide sequence when calculating a corresponding actual electrical current.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: December 26, 2023
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Xin Gao, Yu Li, Sheng Wang, Renmin Han
  • Publication number: 20230411540
    Abstract: A semiconductor device is provided. The semiconductor device includes one or more dielectric layers over a photodiode in a substrate. The semiconductor device includes a radiation channeling structure extending through the one or more dielectric layers, wherein the radiation channeling structure overlies the photodiode. The semiconductor device includes a lens overlying the radiation channeling structure. The radiation channeling structure includes a body having a refractive index higher than a refractive index of a material at least partially surrounding the body.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 21, 2023
    Inventors: Yi-Hsuan FAN, Wen-Sheng WANG, Yen-Ting CHEN
  • Publication number: 20230411318
    Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.
    Type: Application
    Filed: August 7, 2023
    Publication date: December 21, 2023
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Publication number: 20230411231
    Abstract: A fan-out type packaging structure includes a strain adjustment layer, a plurality of chips, an encapsulation layer, a redistribution layer, and a plurality of solder balls. The strain adjustment layer is made of a polymer material and has at least 95% laser absorbance. The plurality of chips are partially embedded in the strain adjustment layer and are spaced apart from each other. The encapsulation layer surrounds the chips and is connected to the strain adjustment layer. The redistribution layer covers the encapsulation layer and the chips. The plurality of solder balls are disposed on the redistribution layer and are spaced apart from each other.
    Type: Application
    Filed: June 12, 2023
    Publication date: December 21, 2023
    Inventors: Chih-Lung YU, Pin-Sheng WANG, Yan-Chiuan LIOU, Yu-Chuan LIU, Yu-Chi LIN, Teng-Kuei CHEN
  • Publication number: 20230401727
    Abstract: A method for aligning a measured image of a pattern printed on a substrate with a design layout. The method includes: obtaining a design layout of a pattern to be printed on a substrate and a measured image of the pattern printed on the substrate; performing a simulation process to generate a plurality of simulated contours of the design layout for a plurality of process conditions of a patterning process; identifying a set of disfavored locations based on the simulated contours; and performing an image alignment process to align the measured image with a selected contour of the simulated contours using locations other than the set of disfavored locations.
    Type: Application
    Filed: October 19, 2021
    Publication date: December 14, 2023
    Applicant: ASML NETHERLANDS B.V.
    Inventor: Te-Sheng WANG
  • Patent number: 11841875
    Abstract: A network device communication system can configure network devices, such as a first database in a multi-tenant deployment and a second database in a private deployment, to send and receive sequence messages, such as replication data, over a channel comprising a plurality of private network nodes. The first database can create a link specifying the data share and the second database. The second database selects the link and a secure area in the private deployment is created into which data is replicated and shared with further accounts in a computationally secure and efficient manner.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: December 12, 2023
    Assignee: Snowflake Inc.
    Inventors: Pui Kei Johnston Chu, Benoit Dageville, Shreyas Narendra Desai, Khondokar Sami Iqram, Subramanian Muralidhar, Chieh-Sheng Wang, Di Wu
  • Patent number: 11836893
    Abstract: A video processing circuit includes an input buffer, an online adaptation circuit, and an artificial intelligence (AI) super-resolution (SR) circuit. The input buffer receives input low-resolution (LR) frames and high-resolution (HR) frames from a video source over a network. The online adaptation circuit forms training pairs, and calculates an update to representative features that characterize the input LR frames using the training pairs. Each training pair formed by one of the input LR frames and one of the HR frames. The AI SR circuit receives the input LR frames from the input buffer and the representative features from the online adaptation circuit. Concurrently with calculating the update to the representative features, the AI SR circuit generates SR frames for display from the input LR frames based on the representative features. Each SR frame has a higher resolution than a corresponding one of the input LR frames.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: December 5, 2023
    Assignee: MediaTek Inc.
    Inventors: Cheng Lung Jen, Pei-Kuei Tsung, Yao-Sheng Wang, Chih-Wei Chen, Chih-Wen Goo, Yu-Cheng Tseng, Ming-En Shih, Kuo-Chiang Lo
  • Patent number: 11835846
    Abstract: A camera module includes a lens barrel comprising a lens; an upper housing, coupled to an end of the lens barrel, including an extension portion extending from an external surface of the lens barrel; a lower housing, coupled to the upper housing, configured to have an internal space; and a first substrate, disposed below the lens barrel, comprising an image sensor. A surface of the extension portion is bonded to the lens barrel, and another surface of the extension portion is bonded to the lower housing, and a shape of the first substrate corresponds to a shape of the internal space of the lower housing.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: December 5, 2023
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Sheng Wang, Cheong Hee Lee
  • Publication number: 20230389255
    Abstract: The present disclosure describes embodiments of a memory device with a pre-charge circuit. The memory device can include a memory cell, and the pre-charge circuit can include a first transistor and a second transistor. The first transistor includes a first gate terminal, a first source/drain (S/D) terminal coupled to a reference voltage, and a second S/D terminal coupled to a first terminal of the memory cell. The second transistor includes a second gate terminal, a third S/D terminal coupled to the reference voltage, and a fourth S/D terminal coupled to the second terminal of the memory cell. The first and second transistors are configured to pass the reference voltage in response to the control signal being applied to the first and second gate terminals, respectively.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Sheng WANG, Yangsyu Lin, Cheng Hung Lee
  • Patent number: 11829544
    Abstract: An electronic device includes a cover plate assembly, a frameless display panel assembly, and an adhesive layer. The cover plate assembly has a first major surface. A peripheral region of the first major surface has a first area. The frameless display panel assembly is disposed below the cover plate assembly and has a second major surface. A peripheral region of the second major surface has a second area smaller than the first area. The adhesive layer is disposed between the peripheral region of the first major surface and the peripheral region of the second major surface. The adhesive layer is a frame-shaped and elastic colloid. The adhesive layer, the cover plate assembly, and the frameless display panel assembly together form a closed space after being pressed together, and the closed space has a spacing smaller than 200 microns.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: November 28, 2023
    Assignee: TPK Advanced Solutions Inc.
    Inventors: Chih Sheng Wang, Li Hung Chang, Jin Huo Liao
  • Patent number: 11825664
    Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
  • Patent number: 11815912
    Abstract: A stability control method and device based on particle active disturbance rejection are provided. The method includes: establishing an active disturbance rejection controller model based on a dynamic model and a speed loop control model of a tethered balloon system, where the speed loop control model is established through theoretical modeling of executive components of a control system of the tethered balloon system; and optimizing to-be-optimized parameters of the active disturbance rejection controller model using a particle swarm optimization algorithm, determining an optimal active disturbance rejection controller model, and using the optimal active disturbance rejection controller model to implement stability control of a photoelectric pod. An active disturbance rejection controller is optimized by using a particle swarm optimization algorithm, which can effectively isolate the internal and external disturbances of the photoelectric pod and improve the imaging stability of the photoelectric pod.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: November 14, 2023
    Assignee: Aerospace Information Research Institute, Chinese Academy of Sciences
    Inventors: Hui Feng, Jiacheng Ma, Sheng Wang, Lei Ao, Xiangqiang Zhang, Tao Qiao
  • Publication number: 20230360697
    Abstract: A memory device includes a memory array having a plurality of memory cells arranged along a plurality of rows extending in a row direction and a plurality of columns extending in a column direction. The memory array also includes a plurality of write assist cells connected to the plurality of memory cells. At least one write assist cell of the plurality of write assist cells is in each of the plurality of columns and connected to respective ones of the plurality of memory cells in a same column.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yangsyu Lin, Po-Sheng Wang, Cheng Hung Lee, Jonathan Tsung-Yung Chang
  • Publication number: 20230359561
    Abstract: The present application discloses techniques for adjusting data storage. The techniques comprises receiving a request of accessing target content from a user; determining a content size of the target content, and querying a cache unit to identify a set of cache blocks storing the target content; determining a space hit ratio based on the content size and a storage capacity corresponding to the set of cache blocks; adjusting an initial block size of the cache unit based on the space hit ratio and a block size of a lower-level storage relative to the cache unit to obtain a new block size of the cache unit when the space hit ratio is less than a predetermined threshold; and configuring newly set up cache blocks for the cache unit based on the new block size.
    Type: Application
    Filed: June 30, 2021
    Publication date: November 9, 2023
    Inventors: Sheng WANG, Shangzhi CAI
  • Patent number: 11810735
    Abstract: A control device includes a display panel and plural key structures. Each key structure includes a keycap, an optical film layer, an elastic element, plural raised structures and a membrane switch. The optical film layer includes a light-transmissible region and a supporting region. The plural raised structures are formed on the supporting region and arranged around the light-transmissible region. The membrane switch includes an upper film layer and a lower film layer. Moreover, a light beam emitted by the display panel is transmitted upwardly through a second opening of the lower film layer, a first opening of the upper film layer, the light-transmissible region, a hollow part of the elastic element and the keycap. When the keycap is pressed down, the first circuit contact point of the upper film layer and the corresponding second circuit contact point of the lower film layer are contacted with each other.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: November 7, 2023
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Wei-Ching Kuo, Ting-Sheng Wang, Rong-Fu Lee