Patents by Inventor Sheng-Wei Chiang

Sheng-Wei Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114690
    Abstract: A method of forming a three-dimensional (3D) memory device includes: forming, over a substrate, a layer stack having alternating layers of a first conductive material and a first dielectric material; forming trenches extending vertically through the layer stack from an upper surface of the layer stack distal from the substrate to a lower surface of the layer stack facing the substrate; lining sidewalls and bottoms of the trenches with a memory film; forming a channel material over the memory film, the channel material including an amorphous material; filling the trenches with a second dielectric material after forming the channel material; forming memory cell isolation regions in the second dielectric material; forming source lines (SLs) and bit lines (BLs) that extend vertically in the second dielectric material on opposing sides of the memory cell isolation regions; and crystallizing first portions of the channel material after forming the SLs and BLs.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: TsuChing Yang, Hung-Chang Sun, Kuo Chang Chiang, Sheng-Chih Lai, Yu-Wei Jiang
  • Publication number: 20240088291
    Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11930645
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate, a transistor region, a first and a second contact plug, a first metal via, a magnetic tunneling junction (MTJ) structure, and a metal interconnect. The transistor region includes a gate over the substrate, and a first and a second doped regions at least partially in the substrate. The first and the second contact plug are over the transistor region. The first and the second contact plug include a coplanar upper surface. The first metal via and the MTJ structure are over the first and the second contact plug, respectively. The first metal via is leveled with the MTJ structure. The metal interconnect is over the first metal via and the MTJ structure, and the metal interconnect includes at least two second metal vias in contact with the first metal via and the MTJ structure, respectively.
    Type: Grant
    Filed: March 5, 2023
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Harry-Hak-Lay Chuang, Sheng-Haung Huang, Tien-Wei Chiang
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 9771302
    Abstract: An environmentally friendly cement comprises (1) an active filler comprising waste materials composed of a thermal insulation wool and a waste thereof; (2) an inert filler comprising metakaolin and an aggregate optionally selected from cement, fine sand, gravel, waste to be solidified, and organic resin; and (3) an aqueous solution of sodium metasilicate as an alkaline compound. A method for producing the environmentally friendly cement comprises mixing ingredients (1) and (3) and ingredients (2) and (3) respectively to obtain a slurry A and a slurry B respectively; mixing the slurry A and B; and hardening the final slurry, whereby elements silicon and aluminum in the ingredient (1) are dissolved out in the basic solution of the ingredient (3), and a closed framework structure is formed by bonding silica and alumina as tetrahedrons. The environmentally friendly cement has excellent fire tolerance, heat insulation, acid and alkaline resistance, and mechanical properties.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: September 26, 2017
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN, R.O.C.
    Inventors: Sheng-Wei Chiang, Chao-Chen Hsu, Kuang-Li Chien, Kou-Min Lin, Jen-Chieh Chung
  • Publication number: 20170260090
    Abstract: An environmentally friendly cement comprises (1) an active filler comprising waste materials composed of a thermal insulation wool and a waste thereof; (2) an inert filler comprising metakaolin and an aggregate optionally selected from cement, fine sand, gravel, waste to be solidified, and organic resin; and (3) an aqueous solution of sodium metasilicate as an alkaline compound. A method for producing the environmentally friendly cement comprises mixing ingredients (1) and (3) and ingredients (2) and (3) respectively to obtain a slurry A and a slurry B respectively; mixing the slurry A and B; and hardening the final slurry, whereby elements silicon and aluminum in the ingredient (1) are dissolved out in the basic solution of the ingredient (3), and a closed framework structure is formed by bonding silica and alumina as tetrahedrons. The environmentally friendly cement has excellent fire tolerance, heat insulation, acid and alkaline resistance, and mechanical properties.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 14, 2017
    Inventors: SHENG-WEI CHIANG, Chao-Chen Hsu, Kuang-Li Chien, Kou-Min Lin, Jen-Chieh Chung
  • Patent number: 9480965
    Abstract: Disclosed is a method for preparing a granulated inorganic adsorbent for radionuclides including slurry forming, solidification, drying and hardening, granulation, and washing steps: blending a dihydrogen phosphate, a powdered inorganic adsorbent raw material and a setting time regulator in water to form a slurry; adding sintered magnesia into the slurry, and blending the mixture to form a solidified slurry; setting the solidified slurry on a disk member, and naturally drying to hardening in a specific temperature range to form a hardened solid material; smashing the hardened solid material and performing vibration sieving by using a screen to obtain a granulated inorganic adsorbent for radionuclides containing residual reagents; washing the granulated inorganic adsorbent for radionuclides containing residual reagents with water, to remove the residual reagents to complete preparation, where the adsorption capacity of the granulated inorganic adsorbent for radionuclides thus prepared is in the range of 0.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: November 1, 2016
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN
    Inventors: Li-Ching Chuang, Chi-Hung Liao, Jen-Chieh Chung, Kou-Min Lin, Sheng-Wei Chiang, Kuang-Li Chien, Zhe-Cheng Hu, Wen-Chi Tsai
  • Patent number: 9409147
    Abstract: The present invention relates to a method for granulation of an absorbent and adsorbent granules prepared by the same. The method comprises the steps of blending sodium metasilicate, metakaoline and an inorganic ion exchange material in water to form a slurry; decanting the resulted slurry onto a nylon cloth of 300 to 400 meshes and natural drying at ambient temperature to solidification; then breaking the solidified final product and sieving it by a screen having a mesh size of from 0.2 to 2.5 mm to provide the absorbent granules having excellent absorbability.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: August 9, 2016
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN
    Inventors: Sheng-Wei Chiang, Kuang-Li Chien, Jen-Chieh Chung, Shih-Che Huang, Chi-Hung Liao, Kou-Min Lin
  • Publication number: 20160067672
    Abstract: Disclosed is a method for preparing a granulated inorganic adsorbent for radionuclides including slurry forming, solidification, drying and hardening, granulation, and washing steps: blending a dihydrogen phosphate, a powdered inorganic adsorbent raw material and a setting time regulator in water to form a slurry; adding sintered magnesia into the slurry, and blending the mixture to form a solidified slurry; setting the solidified slurry on a disk member, and naturally drying to hardening in a specific temperature range to form a hardened solid material; smashing the hardened solid material and performing vibration sieving by using a screen to obtain a granulated inorganic adsorbent for radionuclides containing residual reagents; washing the granulated inorganic adsorbent for radionuclides containing residual reagents with water, to remove the residual reagents to complete preparation, where the adsorption capacity of the granulated inorganic adsorbent for radionuclides thus prepared is in the range of 0.
    Type: Application
    Filed: October 30, 2014
    Publication date: March 10, 2016
    Inventors: LI-CHING CHUANG, CHI-HUNG LIAO, JEN-CHIEH CHUNG, KOU-MIN LIN, SHENG-WEI CHIANG, KUANG-LI CHIEN, ZHE-CHENG HU, WEN-CHI TSAI
  • Publication number: 20150263670
    Abstract: A two path direct frequency modulation system is disclosed. The system includes a Varactor, a voltage-controlled oscillator (VCO) calibration capacitor bank including a first plurality of switchable capacitors, and a frequency deviation capacitor bank including a second plurality of switchable capacitors. The method includes switching on or off a number of the first plurality of switchable capacitors to obtain a desired frequency band and determining number of cycles within a first predetermined time to obtain a first count, switching on or off a number of the first plurality of switchable capacitors or of the second plurality of switchable capacitors to change the desired frequency band and determining number of cycles within a second predetermined time to obtain a second count, and modulating a data signal by switching on or off a switchable capacitors of the second plurality of switchable capacitors according to the first and the second count.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 17, 2015
    Applicant: Uniband Electronic Corp.
    Inventors: Yiping Fan, Chun-Yuan Lin, Sheng-Wei Chiang, Yi-Chun Lu
  • Publication number: 20150238932
    Abstract: The present invention relates to a method for granulation of an absorbent and adsorbent granules prepared by the same. The method comprises the steps of blending sodium metasilicate, metakaoline and an inorganic ion exchange material in water to form a slurry; decanting the resulted slurry onto a nylon cloth of 300 to 400 meshes and natural drying at ambient temperature to solidification; then breaking the solidified final product and sieving it by a screen having a mesh size of from 0.2 to 2.5 mm to provide the absorbent granules having excellent absorbability.
    Type: Application
    Filed: August 7, 2014
    Publication date: August 27, 2015
    Inventors: SHENG-WEI CHIANG, KUANG-LI CHIEN, JEN-CHIEH CHUNG, SHIH-CHE HUANG, CHI-HUNG LIAO, KOU-MIN LIN
  • Patent number: 8948230
    Abstract: An IEEE 802.15.4 DSSS Offset-QPSK device is proposed that allows an existing system to transfer Offset-QPSK modulation signal into MSK modulation signal, then deliver the MSK modulation signal without DSSS to increase payload data transmission rate. On-the-fly detection of whether a low data rate or a high data rate encoding mode is used for a received frame is attained by the transmitter setting a predetermined bit in the frame length byte of a transmitting frame. Thus an extra high data rate transmission for IEEE 802.15.4 DSSS Offset-QPSK systems can be provided.
    Type: Grant
    Filed: November 28, 2013
    Date of Patent: February 3, 2015
    Assignee: Uniband Electronic Corp.
    Inventors: Yiping Fan, Li-Feng Chen, Sheng-Wei Chiang, Chun-Chin Chen