Abstract: A leak check is performed on a semiconductor wafer processing tool that includes a process chamber and process gas lines, and a semiconductor wafer is processed using the semiconductor wafer processing tool if the leak check passes. Each gas line includes a mass flow controller (MFC) and normally closed valves including an upstream and downstream valves upstream and downstream of the MFC. Leak checking includes: leak checking up to the downstream valves of the gas lines with the upstream valves closed and the downstream valves of the gas lines closed; and leak checking up to the upstream valve of each the process gas line with the upstream valves of the of the process gas lines closed and with the downstream valve of the of the process gas line being leak checked open and the downstream valve of every other process gas line closed.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.

Abstract: The present disclosure provides an LED package structure and a method for manufacturing the LED package structure. The LED package structure includes: a chip scale package (CSP) light emitting element and a shading layer, where the CSP light emitting element includes a light emitting chip, and the light emitting chip includes an electrode group located on a bottom surface of the light emitting chip, the shading layer is disposed on a bottom surface and/or a side surface of the CSP light emitting element. An LED package structure according to the present disclosure solves a problem that the blue light leaking from the bottom surface of the LED chip interferes with the emission color of the CSP emitting device, and reduces the luminous efficiency of the emitting device.

Abstract: The present disclosure provides an LED package structure and a method for manufacturing the LED package structure. The LED package structure includes: a chip scale package (CSP) light emitting element and a shading layer, where the CSP light emitting element includes a light emitting chip, and the light emitting chip includes an electrode group located on a bottom surface of the light emitting chip, the shading layer is disposed on a bottom surface and/or a side surface of the CSP light emitting element. An LED package structure according to the present disclosure solves a problem that the blue light leaking from the bottom surface of the LED chip interferes with the emission color of the CSP emitting device, and reduces the luminous efficiency of the emitting device.

Abstract: A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-V-group buffer layer, thus improving crystal quality of the III-V-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.

Abstract: A semiconductor element includes a super-lattice buffer layer including AlxN1-x layers and AlyO1-y layers (0<x<1, 0<y<1). The super-lattice buffer layer can mitigate corrosion to the side wall by chemical solution during chip fabrication, and improve chip yield. Fabrication the super-lattice buffer layer to achieve the effects can be realized, for example, using chemical vapor deposition (CVD).

Abstract: A method for manufacturing a light emitting element includes: a GaN layer is formed on an AlN-deposited plain or patterned substrate, and the stress between different materials is changed and buffered through thermal treatment of annealing under H2 atmosphere or under H2 and NH3 mixed atmosphere, thus eliminating epitaxial wafer warp caused by such stress and improving epitaxial quality and light-emitting efficiency of the light-emitting element.

Abstract: A semiconductor element includes a super-lattice buffer layer including AlxN1-x layers and AlyO1-y layers (0<x<1, 0<y<1). The super-lattice buffer layer can mitigate corrosion to the side wall by chemical solution during chip fabrication, and improve chip yield. Fabrication the super-lattice buffer layer to achieve the effects can be realized, for example, using chemical vapor deposition (CVD).

Abstract: A semiconductor element has a metal protective layer and a metal oxide protective layer formed on the substrate to prevent the Si substrate surface from forming an amorphous layer; and a transition layer to reduce lattice difference between the metal oxide protective layer and the III-IV-group buffer layer, thus improving crystal quality of the III-IV-group buffer layer. A fabrication method can avoid formation of amorphous layers and cracks surrounding the Si substrate surface. A light-emitting diode (LED) element or a transistor element can be formed by depositing a high-quality multi-layer buffer structure via PVD and forming a GaN, InGaN or AlGaN epitaxial layer thereon.

Abstract: A method for manufacturing a light emitting element includes: a GaN layer is formed on an AlN-deposited plain or patterned substrate, and the stress between different materials is changed and buffered through thermal treatment of annealing under H2 atmosphere or under H2 and NH3 mixed atmosphere, thus eliminating epitaxial wafer warp caused by such stress and improving epitaxial quality and light-emitting efficiency of the light-emitting element.