Patents by Inventor Sheng-Wei FU

Sheng-Wei FU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240021475
    Abstract: A semiconductor structure includes a substrate, several gate structures formed in the substrate, dielectric portions formed on the respective gate structures, spacers adjacent to and extending along the sidewalls of the dielectric portions, source regions formed between the substrate and the spacers, and contact plugs formed between adjacent gate structures and contact the respective source regions. The source regions are adjacent to the gate structures. The sidewalls of the spacers are aligned with the sidewalls of the underlying source regions.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 18, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Po-Hsiang LIAO, Sheng-Wei FU, Chung-Yeh LEE
  • Publication number: 20230420529
    Abstract: A semiconductor device includes a substrate, a body region on the substrate, a source region on the body region, a first trench electrode passing through the source region, the body region and a portion of the substrate, a first dielectric cap layer, a first dielectric liner and a conductive layer. The first dielectric cap layer includes a first dielectric portion directly above the first trench electrode and first dielectric spacers on two opposite sides of the first dielectric portion. The first dielectric liner surrounds the first trench electrode and the first dielectric portion. The conductive layer covers the first dielectric cap layer and includes an electrode contact. The electrode contact includes a first portion in the body region and a second portion adjacent to one of the first dielectric spacers, where the first and second portions have the same width.
    Type: Application
    Filed: June 26, 2022
    Publication date: December 28, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Po-Hsiang Liao, Sheng-Wei Fu, Chung-Yeh Lee
  • Patent number: 11081560
    Abstract: A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: August 3, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Tsung-Yeh Chen, Sheng-Wei Fu, Chung-Yeh Lee
  • Patent number: 10770396
    Abstract: A semiconductor structure includes a substrate, an epitaxial layer disposed on the substrate, a conductive feature disposed in the epitaxial layer having a protruding portion that is higher than the epitaxial layer, and a diffusion barrier layer disposed on sidewalls of the conductive feature.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: September 8, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Fang-Ming Lee, Sheng-Wei Fu, Chung-Yeh Lee
  • Publication number: 20200211964
    Abstract: A semiconductor structure includes a substrate, an epitaxial layer disposed on the substrate, a conductive feature disposed in the epitaxial layer having a protruding portion that is higher than the epitaxial layer, and a diffusion barrier layer disposed on sidewalls of the conductive feature.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Fang-Ming LEE, Sheng-Wei FU, Chung-Yeh LEE
  • Publication number: 20200194564
    Abstract: A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer.
    Type: Application
    Filed: February 25, 2020
    Publication date: June 18, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tsung-Yeh CHEN, Sheng-Wei FU, Chung-Yeh LEE
  • Patent number: 10615263
    Abstract: A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: April 7, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Tsung-Yeh Chen, Sheng-Wei Fu, Chung-Yeh Lee
  • Patent number: 10600906
    Abstract: A method for forming a semiconductor device is provided. A plurality of trenches are formed in the substrate. An isolation oxide layer is formed in the trenches and on the substrate. A shield polysilicon is deposited in the trenches and on the isolation oxide layer on the substrate. A first etching process is performed to remove a first portion of the shield polysilicon. A first removal process is performed to remove a first portion of the isolation oxide layer. A second etching process is performed to remove a second portion of the shield polysilicon. A second removal process is performed to remove a second portion of the isolation oxide layer. An inter-poly oxide layer is formed on the remaining shield polysilicon and the remaining isolation oxide layer, wherein the inter-poly oxide layer has a concave top surface.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: March 24, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chung-Yen Chien, Sheng-Wei Fu, Chung-Yeh Lee
  • Publication number: 20200075758
    Abstract: A method for forming a semiconductor device is provided. A plurality of trenches are formed in the substrate. An isolation oxide layer is formed in the trenches and on the substrate. A shield polysilicon is deposited in the trenches and on the isolation oxide layer on the substrate. A first etching process is performed to remove a first portion of the shield polysilicon. A first removal process is performed to remove a first portion of the isolation oxide layer. A second etching process is performed to remove a second portion of the shield polysilicon. A second removal process is performed to remove a second portion of the isolation oxide layer. An inter-poly oxide layer is formed on the remaining shield polysilicon and the remaining isolation oxide layer, wherein the inter-poly oxide layer has a concave top surface.
    Type: Application
    Filed: November 7, 2019
    Publication date: March 5, 2020
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chung-Yen CHIEN, Sheng-Wei FU, Chung-Yeh LEE
  • Publication number: 20190386132
    Abstract: A method for forming a semiconductor device is provided. A plurality of trenches are formed in the substrate. An isolation oxide layer is formed in the trenches and on the substrate. A shield polysilicon is deposited in the trenches and on the isolation oxide layer on the substrate. A first etching process is performed to remove a first portion of the shield polysilicon. A first removal process is performed to remove a first portion of the isolation oxide layer. A second etching process is performed to remove a second portion of the shield polysilicon. A second removal process is performed to remove a second portion of the isolation oxide layer. An inter-poly oxide layer is formed on the remaining shield polysilicon and the remaining isolation oxide layer, wherein the inter-poly oxide layer has a concave top surface.
    Type: Application
    Filed: June 13, 2018
    Publication date: December 19, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chung-Yen CHIEN, Sheng-Wei FU, Chung-Yeh Lee
  • Patent number: 10510878
    Abstract: A method for forming a semiconductor device is provided. A plurality of trenches are formed in the substrate. An isolation oxide layer is formed in the trenches and on the substrate. A shield polysilicon is deposited in the trenches and on the isolation oxide layer on the substrate. A first etching process is performed to remove a first portion of the shield polysilicon. A first removal process is performed to remove a first portion of the isolation oxide layer. A second etching process is performed to remove a second portion of the shield polysilicon. A second removal process is performed to remove a second portion of the isolation oxide layer. An inter-poly oxide layer is formed on the remaining shield polysilicon and the remaining isolation oxide layer, wherein the inter-poly oxide layer has a concave top surface.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 17, 2019
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chung-Yen Chien, Sheng-Wei Fu, Chung-Yeh Lee
  • Publication number: 20190378902
    Abstract: A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tsung-Yeh CHEN, Sheng-Wei FU, Chung-Yeh LEE