Patents by Inventor Sheng-Wei Wang

Sheng-Wei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210019002
    Abstract: A method for manufacturing capacitive touch control panel and a capacitive touch control panel are provided. The method includes forming a sensing circuit on a substrate and then forming a communicating structure on the substrate. The communicating structure is conductive, and is disposed to be near at least two adjacent side walls of the substrate. A gap is formed between the communicating structure and the plurality of the sensing electrodes that are near the communicating structure. The next step is to form a plurality of bridging structures for connecting the plurality of the sensing electrodes and the communicating structure. The last step is to remove a portion of the communicating structure by laser cutting to form a plurality of output cables.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: CHUN-WEI YEH, SHENG-LIANG LIN, YI-HAN WANG, HUNG-YU TSAI
  • Publication number: 20210010901
    Abstract: An automatic mounting and demounting device and system for a motor testing platform, adapted to enable a control host to control automatic mounting and demounting between an axle of a motor under test and an axle of a testing apparatus, includes a mobile platform and a positional information sensing member. The control host controls the mobile platform according to positional information generated by the positional information sensing member, such that a carrier for carrying the motor under test is automatically driven to a corresponding position to thereby effect alignment and connection or separation of the axle of the motor under test and the axle of the testing apparatus. Therefore, preparation for the motor dynamics testing is automatically carried out effectively and correctly, thereby reducing the time and manpower required for testing-related preparation.
    Type: Application
    Filed: June 18, 2020
    Publication date: January 14, 2021
    Inventors: MING-YEN CHEN, JIAN-LIN LEE, SHENG-WEI LIN, CHIH-HSIEN WANG
  • Patent number: 10891410
    Abstract: In an example embodiment, a computer-implemented method is provided for receiving an integrated circuit design, wherein the integrated circuit design comprises at least one position in violation of one or more design rules associated with the integrated design, identifying one or more design patterns at the at least one violating position, generating one or more pattern graphs for the one or more design patterns, extracting a system on chip design for transformation into a block graph, and. comparing the block graph with each of the one or more pattern graphs to determine whether the at least one violating position is cleared. In circumstances where a match is found between the block graph and the each of the one or more pattern graphs, the computer-implemented method further comprises changing the one or more design patterns and repeating the step of comparing until there is no further match found.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: January 12, 2021
    Assignee: Synopsys, Inc.
    Inventors: Chin-Hsiung Hsu, Philip Hui-Yuh Tai, Sheng-Wei Yang, Guo-Ting Wang
  • Publication number: 20200380194
    Abstract: A method (of generating a layout diagram) includes: identifying, in the layout diagram, a group of three or more cells which violates a horizontal constraint vector (HCV) and is arranged so as to exhibit two or more vertically-aligned edge-pairs (VEPs); each VEP including two members representing at least partial portions of vertical edges of corresponding cells of the group; relative to a horizontal direction, the members of each VEP being disposed in edgewise-abutment and separated by a corresponding actual gap; and the HCV having separation thresholds, each of which has a corresponding VEP and represents a corresponding minimum gap in the horizontal direction between the members of the corresponding VEP; and for each of at least one but fewer than all of the separation thresholds, selectively moving a given one of cells corresponding to one of the members of the corresponding VEP thereby to avoid violating the HCV.
    Type: Application
    Filed: August 19, 2020
    Publication date: December 3, 2020
    Inventors: Meng-Kai HSU, Sheng-Hsiung CHEN, Wai-Kei MAK, Ting-Chi WANG, Yu-Hsiang CHENG, Ding-Wei HUANG
  • Patent number: 10854514
    Abstract: A memory device with a dielectric layer or an air gap between contacts and a method of making the same are disclosed. The method comprises a series of steps including forming a plurality of conductive lines having trenches therebetween; forming a contact layer in the trench; and forming a dielectric layer interposed in the contact layer and configured to divide the contact layer into two contacts. The method also comprises removing the dielectric layer to form a space and forming a cap layer over the two contacts to form an air gap therein. The method further comprises forming a second air gap between the conductive line and the two contacts.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 1, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Tieh-Chiang Wu, Wen-Chieh Wang, Sheng-Wei Yang
  • Patent number: 10846114
    Abstract: A virtual time control apparatus, method, and non-transitory computer readable storage medium thereof are provided. The virtual time control apparatus includes a system timer, a real time clock, and a processing unit, wherein the processing unit is electrically connected to the system timer and the real time clock. The system timer has an original timer period, while the real time clock has an original tick period. The processing unit executes a hypervisor. The hypervisor generates a virtual timer period according to an adjustment ratio and the original timer period. The hypervisor generates a virtual tick period according to the adjustment ratio and the original tick period.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: November 24, 2020
    Assignee: Institute For Information Industry
    Inventors: Sheng-Hao Wang, Jian-De Jiang, Chin-Wei Tien, Chih-Hung Lin
  • Patent number: 10802638
    Abstract: A touch display device includes a display module, a touch module and a light-transmitting substrate. The display module has a display surface and a bottom surface opposite to the display surface. The touch module is fixed to the display surface by an adhesive. The adhesive, the touch module and the display surface jointly define an accommodating space between the display module and the touch module. The light-transmitting substrate is disposed in the accommodating space. One side of the light-transmitting substrate is fixed to the display surface by a first optical adhesive, and the other side of the light-transmitting substrate is fixed to the touch module by a second optical adhesive. An adhesive strength of the adhesive is higher than an adhesive strength of the first optical adhesive, and the adhesive strength of the adhesive is higher than an adhesive strength of the second optical adhesive.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: October 13, 2020
    Assignee: HIGGSTEC INC.
    Inventors: Chun-Wei Yeh, Sheng-Liang Lin, Yi-Han Wang, Hung-Yu Tsai
  • Patent number: 10776551
    Abstract: A method (of generating a layout diagram) includes: identifying, in the layout diagram, a group of three or more cells which violates a horizontal constraint vector (HCV) and is arranged so as to exhibit two or more vertically-aligned edge-pairs (VEPs); each VEP including two members representing at least partial portions of vertical edges of corresponding cells of the group; relative to a horizontal direction, the members of each VEP being disposed in edgewise-abutment and separated by a corresponding actual gap; and the HCV having separation thresholds, each of which has a corresponding VEP and represents a corresponding minimum gap in the horizontal direction between the members of the corresponding VEP; and for each of at least one but fewer than all of the separation thresholds, selectively moving a given one of cells corresponding to one of the members of the corresponding VEP thereby to avoid violating the HCV.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: September 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Meng-Kai Hsu, Sheng-Hsiung Chen, Wai-Kei Mak, Ting-Chi Wang, Yu-Hsiang Cheng, Ding-Wei Huang
  • Publication number: 20200272781
    Abstract: A method includes laying out a standard cell region, with a rectangular space being within the standard cell region. The standard cell region includes a first row of standard cells having a first bottom boundary facing the rectangular space, and a plurality of standard cells having side boundaries facing the rectangular space. The plurality of standard cells include a bottom row of standard cells. A memory array is laid out in the rectangular space, and a second bottom boundary of the bottom row and a third bottom boundary of the memory array are aligned to a same straight line. A filler cell region is laid out in the rectangular space. The filler cell region includes a first top boundary contacting the first bottom boundary of the first row of standard cells, and a fourth bottom boundary contacting a second top boundary of the memory array.
    Type: Application
    Filed: December 20, 2019
    Publication date: August 27, 2020
    Inventors: Feng-Ming Chang, Ruey-Wen Chang, Ping-Wei Wang, Sheng-Hsiung Wang, Chi-Yu Lu
  • Patent number: 10749286
    Abstract: An electrical connector includes an insulating housing and a plurality of electrical terminals. A top wall of the insertion space defines a plurality of terminal grooves recessing upward. The plurality of electrical terminals are arranged in the plurality of the terminal grooves. Each of the plurality of the electrical terminals has a fixing portion. A middle of the fixing portion is of a hollow shape and is defined as a material reduction area. A front end of the fixing portion is connected with a contacting portion. A bottom of the fixing portion extends downward to form a guiding portion. A rear of the guiding portion is bent sideward and then is bent frontward to form a material increase area. two sides of the guiding portion are chamfered to form two chamfers. A bottom end of the guiding portion extends rearward to from a soldering portion.
    Type: Grant
    Filed: January 20, 2019
    Date of Patent: August 18, 2020
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Han-Wei Wang, Sheng-Yuan Huang, Pei-Yi Lin, Te-Hung Yin
  • Publication number: 20200234016
    Abstract: The present invention provides an object storing apparatus, an object access method, an object obtaining service method, and an object indication method thereof. The object storing apparatus includes a cabinet body and a cabinet door, and storing positions are disposed inside the cabinet body. The object access method includes the following steps. Whether the cabinet door is opened is determined. In response to the cabinet door being opened, whether a scanning operation for a first external object is activated is determined. The first external object being not an existing external object at a storing position. In response to the scanning operation being activated, object storing is determined. In response to the existing external object being moved, object obtaining is determined. Accordingly, an automatic and convenient storing function can be provided.
    Type: Application
    Filed: April 25, 2019
    Publication date: July 23, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Kai-Yi Chen, Pin-Yu Chou, Sheng-Chieh Tang, Che-Wei Liang, Chia-Shin Weng, Wei-Jun Wang, Wen-Yi Chiu
  • Publication number: 20200209526
    Abstract: An optical imaging lens including a first lens element, a second lens element, a third lens element, an aperture, a fourth lens element and a fifth lens element is provided. The first lens element is arranged to be a lens element of which refracting power being equal to 0 inverse millimeter (mm?1) in a first order from the object-side to the image-side. The second lens element is arranged to be a lens element having refracting power in a first order from the first lens element to the image-side. The third lens element is arranged to be a lens element having refracting power in a second order from the first lens element to the image-side. The fourth and fifth lens element are respectively arranged to be lens elements having refracting power in a first and a second order from the aperture to the image-side.
    Type: Application
    Filed: March 18, 2019
    Publication date: July 2, 2020
    Applicant: GENIUS ELECTRONIC OPTICAL CO., LTD.
    Inventors: Sheng-Wei Hsu, Pei-Chi Wang
  • Publication number: 20200152763
    Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.
    Type: Application
    Filed: January 13, 2020
    Publication date: May 14, 2020
    Inventors: Yu-Wen Cheng, Cheng-Tung Lin, Chih-Wei Chang, Hong-Mao Lee, Ming-Hsing Tsai, Sheng-Hsuan Lin, Wei-Jung Lin, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Wei-Yip Loh, Ya-Yi Cheng
  • Patent number: 10643842
    Abstract: A method for making patterned two dimensional (2D) transition metal dichalcogenides (TMDs) nanomaterials is disclosed. The method includes making a substrate, wherein the substrate has a substrate surface including a first portion surface and a second portion surface, the first portion surface is formed by oxide or nitride, and the second portion surface is formed by mica; applying a mono 2D TMDs nanomaterials; annealing the mono 2D TMDs nanomaterials and the substrate in an oxygen containing gas, the annealing temperature is controlled so that only the part of the 2D TMDs nanomaterials, that is on the second portion surface, is removed by oxidization, and the other part of the 2D TMDs nanomaterials, that is on the first portion surface, is remained to form the patterned 2D TMDs nanomaterials.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: May 5, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Xue-Wen Wang, Kai Liu, Ji-Wei Hou, Sheng-Zhe Hong
  • Patent number: 10640372
    Abstract: A method for fabricating a semiconductor device is disclosed. A semiconductor substrate comprising a MOS transistor is provided. A MEMS device is formed over the MOS transistor. The MEMS device includes a bottom electrode in a second topmost metal layer, a diaphragm in a pad metal layer, and a cavity between the bottom electrode and the diaphragm.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: May 5, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tsong-Lin Shen, Chien-Chung Su, Chih-Cheng Wang, Yu-Chih Chuang, Sheng-Wei Hung, Min-Hung Wang, Chin-Tsai Chang
  • Publication number: 20200130130
    Abstract: Systems and methods are provided for predicting irregular motions of one or more mechanical components of a semiconductor processing apparatus. A mechanical motion irregular prediction system includes one or more motion sensors that sense motion-related parameters associated with at least one mechanical component of a semiconductor processing apparatus. The one or more motion sensors output sensing signals based on the sensed motion-related parameters. Defect prediction circuitry predicts an irregular motion of the at least one mechanical component based on the sensing signals.
    Type: Application
    Filed: June 5, 2019
    Publication date: April 30, 2020
    Inventors: Chunhung Chen, Yu Chi Tsai, Chin Wei Chuang, Bo-An Chen, Sheng-Chen Wang, Chen-Hua Tsai
  • Publication number: 20200126966
    Abstract: An integrated circuit includes a plurality of gate electrode structures extending along a first direction and having a predetermined spatial resolution measurable along a second direction orthogonal to the first direction. The plurality of gate electrode structures includes a first gate electrode structure having a first portion and a second portion separated in the first direction, and a second gate electrode structure having a third portion and a fourth portion separated in the first direction. The integrated circuit further includes a conductive feature including a first section electrically connected to the second portion, wherein the first section extends in the second direction, a second section electrically connected to the third portion, wherein the second section extends in the second direction, and a third section electrically connecting the first section and the second section, the third section extends in a third direction angled with respect to the first and second directions.
    Type: Application
    Filed: December 20, 2019
    Publication date: April 23, 2020
    Inventors: Tung-Heng HSIEH, Hui-Zhong ZHUANG, Chung-Te LIN, Sheng-Hsiung WANG, Ting-Wei CHIANG, Li-Chun TIEN
  • Publication number: 20200100107
    Abstract: Securing public hotspot communications by: generating a public-private key pair, deriving an SSID using the generated public key, creating a network using the SSID, specifying a network security setting, and providing a Client the SSID and network security settings. Further, by: receiving a network connection request from the Client, establishing a connection with the Client, receiving a probe request from a network access point, sending an authentication message, receiving SSID configuration information from the network access point, associating the SSID network and the network access point, and receiving Client data.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Chih-Wei Hsiao, Wei-Hsiang Hsiung, Chih-Wen Chao, Sheng Hao Wang
  • Publication number: 20200087379
    Abstract: The present invention relates to compositions comprising factor VIII coagulation factors linked to extended recombinant polypeptide (XTEN), isolated nucleic acids encoding the compositions and vectors and host cells containing the same, and methods of making and using such compositions in treatment of factor VIII-related diseases, disorders, and conditions.
    Type: Application
    Filed: July 25, 2019
    Publication date: March 19, 2020
    Inventors: Volker Schellenberger, Pei-Yun Chang, Fatbardha Varfaj, Sheng Ding, Joshua Silverman, Chia-wei Wang, Benjamin Spink, Willem P. Stemmer, Nathan Geething, John Kulman, Tongyao Liu, Garabet G. Toby, Haiyan Jiang, Robert Peters, Deping Wang, Baisong Mei
  • Publication number: 20200078478
    Abstract: A PSMA targeting peptide derivative for radiotherapy, which is a structural molecule developed for diagnosis or treatment of prostate cancer, as prostate-specific membrane antigen (PSMA) is a protein present on the surface of healthy prostate cells, which is often at a high level of expression on the surface of prostate cancer cells, and the molecular composition of PSMA inhibitor is mainly composed of glutamic acid, urea and lysine, in addition to the linker of the present invention, PSMA inhibitor can be combined with a chelating agent and truncated Evans Blue, which can be labeled with radionuclides Ga-67, Ga-68, In-111, Lu-177, Cu-64 or Y-90, used for image analysis and analysis of human prostate cancer tumor pattern as a new PSMA targeting peptide receptor radionuclide therapy (PRRT), and which has a longer half-life in vivo and is featured by specific binding of PSMA for radiotherapy diagnosis or treatment.
    Type: Application
    Filed: September 10, 2018
    Publication date: March 12, 2020
    Inventors: Ming-Hsin Li, Ming-Wei Chen, Shin-Min Wang, Shih-Wei Lo, Chun-Fang Feng, Cheng-Hui Chuang, Sheng-Nan Lo