Patents by Inventor Sheng-Ying WU

Sheng-Ying WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935728
    Abstract: In order to reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Cheng Wu, Sheng-Ying Wu, Ming-Hsien Lin, Chun Fu Chen
  • Patent number: 11569071
    Abstract: A processing chamber includes a ground shield and a cover ring. The ground shield includes an annular body, and at least one guide pin extending from the annular body. The cover ring is positioned on the ground shield, and includes an annular body including at least one recess. At least a part of the at least one guide pin is receivable in the at least one recess, an inner cylindrical ring extends from the annular body, and an outer cylindrical ring extends from the annular body and is radially separated from the inner cylindrical ring by a horizontally extending portion of the annular body.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tsung-Cheng Wu, Sheng-Ying Wu, Ming-Hsien Lin
  • Publication number: 20220356560
    Abstract: A physical vapor deposition (PVD) system is provided. The PVD system includes a PVD chamber defining a PVD volume within which a target material of a target is deposited onto a wafer. The PVD system includes the target in the PVD chamber. The target is configured to overlie the wafer. An edge of the target extends from a first surface of the target to a second surface of the target, opposite the first surface of the target. A first portion of the edge of the target has a first surface roughness. The first portion of the edge of the target extends at most about 6 millimeters from the first surface of the target to a second portion of the edge of the target. The second portion of the edge of the target has a second surface roughness less than the first surface roughness.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 10, 2022
    Inventors: Sheng-Ying WU, Ming-Hsien LIN, Po-Wei WANG, Hsiao-Feng LU
  • Publication number: 20220310362
    Abstract: A processing chamber includes a ground shield and a cover ring. The ground shield includes an annular body, and at least one guide pin extending from the annular body. The cover ring is positioned on the ground shield, and includes an annular body including at least one recess. At least a part of the at least one guide pin is receivable in the at least one recess, an inner cylindrical ring extends from the annular body, and an outer cylindrical ring extends from the annular body and is radially separated from the inner cylindrical ring by a horizontally extending portion of the annular body.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 29, 2022
    Inventors: Tsung-Cheng WU, Sheng-Ying WU, Ming-Hsien LIN
  • Publication number: 20210241999
    Abstract: In order to reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.
    Type: Application
    Filed: January 5, 2021
    Publication date: August 5, 2021
    Inventors: Tsung-Cheng WU, Sheng-Ying WU, Ming-Hsien LIN, Chun Fu CHEN
  • Publication number: 20210238741
    Abstract: An assembly includes a cover ring having a first surface and a second surface opposite the first surface, the first surface of the cover ring having a first roughness, and a deposition ring having a first surface facing the cover ring and a second surface opposite the first surface, the first surface of the deposition ring having a second roughness. The first roughness is different from the second roughness.
    Type: Application
    Filed: December 11, 2020
    Publication date: August 5, 2021
    Inventors: Tsung-Cheng WU, Sheng-Ying WU, Ming-Hsien LIN