Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to one embodiment includes an active region including a channel region and a source/drain region adjacent the channel region, a gate structure over the channel region of the active region, a source/drain contact over the source/drain region, a dielectric feature over the gate structure and including a lower portion adjacent the gate structure and an upper portion away from the gate structure, and an air gap disposed between the gate structure and the source/drain contact. A first width of the upper portion of the dielectric feature along a first direction is greater than a second width of the lower portion of the dielectric feature along the first direction. The air gap is disposed below the upper portion of the dielectric feature.

Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.

Abstract: Doping techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a fin structure, forming a doped amorphous layer over a portion of the fin structure, and performing a knock-on implantation process to drive a dopant from the doped amorphous layer into the portion of the fin structure, thereby forming a doped feature. The doped amorphous layer includes a non-crystalline form of a material. In some implementations, the knock-on implantation process crystallizes at least a portion of the doped amorphous layer, such that the portion of the doped amorphous layer becomes a part of the fin structure. In some implementations, the doped amorphous layer includes amorphous silicon, and the knock-on implantation process crystallizes a portion of the doped amorphous silicon layer.

Abstract: A brake disc assembly includes a disc main body having first through holes, a connecting seat having second through holes, and fastening devices each including a bolt, a nut, a spacer clamped between the disc main body and connecting seat and including a third through hole, and a sleeve including a fourth through hole. An insertion portion of the sleeve is disposed in the first, second and third through holes. The bolt includes a rod portion inserted through the fourth through hole and having a threaded section onto which the nut is screwed so that the disc main body, spacer, connecting seat and an abutment portion of the sleeve are clamped between a head portion of the bolt and the nut. The brake disc assembly has concise structure and low manufacturing cost, and provides slight floating effect of the disc main body while preventing foreign objects from entering therein.

Abstract: A ventilated brake disc includes first and second plates, and a plurality of connecting ribs and protruding ribs. The first and second plates are each shaped as a circular ring, and each have inner and outer surfaces. The inner surfaces of the first and second plates face each other. The first and second plates collectively form a central via and an outer periphery of the ventilated brake disc. Each connecting rib is integrally connected to the inner surfaces of the first and second plates, and elongated in shape, thereby defined with two opposite ends, which are oriented toward the central via and the outer periphery respectively. Each protruding rib protrudes integrally from the inner surface of the first or second plate, and is not connected to the other plate and located between two connecting ribs. The present invention simultaneously attains lightweight and great structural strength and heat dissipating effect.

Abstract: An axle sleeve assembly includes a bushing with a first through hole, and an adjusting shaft jammed in the first through hole capably of being rotated by external force and having a second through hole whose central axis is parallel deviated from the central axis of the first through hole. A control arm device includes a control arm and two aforementioned axle sleeve assemblies. The control arm includes a front end portion for being installed with a joint, and two rear end portions each having an installation hole. The installation holes are coaxial with each other, and the bushings are disposed therein in a tight fit manner respectively. The axle sleeve assembly and the control arm device are applicable to an upper control arm of a double A-arm suspension system for adjusting the camber angle of a wheel, and have high structural strength.

Abstract: A hydraulic brake and electronic parking integrated caliper includes a base, a main body movable relative to the base, two brake pads movable relative to the main body, two hydraulic pistons for pushing the brake pads, an electronic drive fixed to the main body, a threaded rod driven by the electronic drive to rotate, and a linearly displacing member displaceable relative to the threaded rod. When moving from a first position to a second position, the linearly displacing member pushes a hydraulic piston and a brake pad toward a direction to press against a brake disc. When moving from the second position to a third position, the linearly displacing member moves the threaded rod, electronic drive and main body toward another direction to make the other hydraulic piston and brake pad press against the brake disc. The caliper has simple structure and generates larger clamping force.

Abstract: A control circuit for an input device including a micro-switch is provided. The control circuit includes an input circuit, a receiver circuit, a control unit, and a detecting unit. The input circuit includes a first contact and a second contact for electrically connecting to the micro-switch. The receiver circuit includes a third contact and a fourth contact for electrically connecting to the micro-switch. The control unit is electrically connected to the first contact and the third contact for providing an input signal via the first contact to the micro-switch and receiving a switching signal from the micro-switch via the third contact. The detecting unit detects a voltage of the second contact to generate a detecting signal. The control unit receives the detecting signal to determine a type of the micro-switch.

Abstract: A control circuit for an input device including a micro-switch is provided. The control circuit includes an input circuit, a receiver circuit, a control unit, and a detecting unit. The input circuit includes a first contact and a second contact for electrically connecting to the micro-switch. The receiver circuit includes a third contact and a fourth contact for electrically connecting to the micro-switch. The control unit is electrically connected to the first contact and the third contact for providing an input signal via the first contact to the micro-switch and receiving a switching signal from the micro-switch via the third contact. The detecting unit detects a voltage of the second contact to generate a detecting signal. The control unit receives the detecting signal to determine a type of the micro-switch.

Abstract: A method for fabricating a mesa sidewall with a spin coated dielectric material and a semiconductor element fabricated by the same are provided in the present invention. The method includes the steps of: disposing an object on a semiconductor substrate; performing a spin coating process to coat with a liquid dielectric material; performing a drying process to dry the liquid dielectric material; performing a first etching process to remove an upper part of the dried dielectric material to expose a metal part (unaffected by ion bombardment) of the object; performing a deposition process to insulate the metal part (unaffected by ion bombardment) of the object; and performing a second etching process to form a semiconductor element with a mesa sidewall.

Abstract: A method for fabricating a mesa sidewall with a spin coated dielectric material and a semiconductor element fabricated by the same are provided in the present invention. The method includes the steps of: disposing an object on a semiconductor substrate; performing a spin coating process to coat with a liquid dielectric material; performing a drying process to dry the liquid dielectric material; performing a first etching process to remove an upper part of the dried dielectric material to expose a metal part (unaffected by ion bombardment) of the object; performing a deposition process to insulate the metal part (unaffected by ion bombardment) of the object; and performing a second etching process to form a semiconductor element with a mesa sidewall.

Abstract: A method for fabricating a resistor for a resistance random access memory (RRAM) includes: (a) forming a first electrode over a substrate; (b) forming a variable resistance layer of zirconium oxide on the first electrode under a working temperature, which ranges from 175° C. to 225° C.; and (c) forming a second electrode of Ti on the variable resistance layer.

Abstract: A method for fabricating a resistor for a resistance random access memory (RRAM) includes: (a) forming a first electrode over a substrate; (b) forming a variable resistance layer of zirconium oxide on the first electrode under a working temperature, which ranges from 175° C. to 225° C.; and (c) forming a second electrode of Ti on the variable resistance layer.

Abstract: A present invention relates to a method of erasing a P-channel non-volatile memory is provided. This P-channel non-volatile memory includes a select transistor and a memory cell connected in series and disposed on a substrate. In the method of erasing the P-channel non-volatile memory, holes are injected into a charge storage structure by substrate hole injection effect. Hence, the applied operational voltage is low, so the power consumption is lowered, and the efficiency of erasing is enhanced. As a result, an operational speed of the memory is accelerated, and the reliability of the memory is improved.

Abstract: A heterojunction bipolar transistor (HBT) has a (In)(Al)GaAsSb/InGaAs base-collector structure. A discontinuous base-collector conduction band forms a built-in electric field to infuse electrons into a collector structure effectively, while a discontinuous base-collector valence band prevents holes from spreading into the collector structure at the same time. Thus, a current density is increased. In addition, the small offset voltage of the base-emitter and base-collector junctions reduce a power consumption.

Abstract: A present invention relates to a method of erasing a P-channel non-volatile memory is provided. This P-channel non-volatile memory includes a select transistor and a memory cell connected in series and disposed on a substrate. In the method of erasing the P-channel non-volatile memory, holes are injected into a charge storage structure by substrate hole injection effect. Hence, the applied operational voltage is low, so the power consumption is lowered, and the efficiency of erasing is enhanced. As a result, an operational speed of the memory is accelerated, and the reliability of the memory is improved.

Abstract: A hetero junction bipolar transistor (HBT) has a (In)(Al)GaAsSb/InGaAs base-collector structure. A discontinuous base-collector conduction band forms a built-in electric field to infuse electrons into a collector structure effectively, while a discontinuous base-collector valence band prevents holes from spreading into the collector structure at the same time. Thus, a current density is increased. In addition, the small offset voltage of the base-emitter and base-collector junctions reduce a power consumption.