Patents by Inventor Sheng Zhang
Sheng Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12346315Abstract: Techniques for handling natural language query processing are described. In some examples, entities are recognized during an entity recognition phase and then relations between those entities are determined. Those relations are fed to an entity linker to help the linker link candidate to columns and/or a intent representation generator to help parse multiple values and column pairs of a natural language query.Type: GrantFiled: March 21, 2023Date of Patent: July 1, 2025Assignee: Amazon Technologies, Inc.Inventors: Sheng Zhang, Patrick Ng, Zhiguo Wang, Anuj Chauhan, Jiarong Jiang, Rishav Chakravarti, Stephen Michael Ash, Bing Xiang, Gregory David Adams
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Patent number: 12344856Abstract: Provided are a preparation method and system for a recombinant adeno-associated virus (rAAV) and a recombinant bacmid. The method comprises: first reconstructing a recombinant bacmid containing a recombinant baculovirus genome that produces essential functional elements for an rAAV, at least one of the essential functional elements being inserted into the N-terminal or C-terminal of a locus of an essential gene of the recombinant baculovirus genome; and then transfecting the obtained recombinant bacmid containing the recombinant baculovirus genome that produces the rAAV into a host cell line for culturing to prepare an rAAV. Compared with recombinant baculoviruses obtained by conventional Tn7 recombinant preparations of recombinant bacmid, the recombinant baculovirus obtained by inserting a core element containing Cap, Rep and ITR into two sides of a baculovirus essential gene has a more stable rAAV serial passage production level in a cell and has a higher rAAV yield.Type: GrantFiled: December 18, 2020Date of Patent: July 1, 2025Assignee: Genevoyager (Wuhan) Co., Ltd.Inventors: Ting Mei, Xiaobin He, Xing Pan, Sheng Zhang, Gang Huang, Mengdie Wang, Yu Zuo, Liang Du
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Publication number: 20250200798Abstract: Embodiments of the present disclosure provide a positioning method and apparatus, and an electronic device, and the positioning method includes: acquiring a fusion pose of a query frame from a terminal; acquiring, based on the fusion pose of the query frame, a plurality of candidate pictures from a cloud database, a spatial distance and an angle between each of the plurality of candidate pictures and the query frame meeting a preset condition; determining, from the plurality of candidate pictures, a top specified number of candidate pictures each having a minimum spatial distance from the query frame as a recall frame; and determining, based on a matching relationship between feature points of the recall frame and feature points of the query frame, a pose of the query frame to perform positioning according to the pose of the query frame.Type: ApplicationFiled: March 20, 2023Publication date: June 19, 2025Inventors: Meixia LIN, Hengkai GUO, Sheng ZHANG
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Patent number: 12327187Abstract: A method for detecting anomalous data is provided. The method comprises collecting a training dataset comprising a number of transactional time series, wherein the time series comprise non-anomalous data entries for a specified transaction type. The training dataset is fed into a gated recurrent unit (GRU) network, which learns the data distribution for the transactional time series. The GRU predicts expected future values of the specified transaction type according to the learned data distribution. An upper bound and a lower bound for future values are calculated based a standard deviation of the predicted values. When new data entries of the specified transaction type are received their values are compared to the upper bound and the lower bound, and an error notification is provided if the values of the new data entries fall outside the upper bound or lower bound.Type: GrantFiled: May 21, 2021Date of Patent: June 10, 2025Assignee: ADP, Inc.Inventors: Sheng Zhang, Warren Douglas Campbell, Yongmei Jia
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Publication number: 20250164718Abstract: Novel tools and techniques are provided for implementing a semiconductor package or a chip package, and more particularly methods, systems, and apparatuses are provided for implementing a semiconductor package or a chip package including an optical package or co-packaged optics package comprising a lid. In an embodiment, an optical package can include a first substrate, a first circuit coupled to the first substrate and configured to transmit or receive an electrical signal, a second circuit coupled to the first substrate and configured to transmit or receive an optical signal, and a lid configured to couple to the first substrate and configured to cover at least a portion of the first circuit or the second circuit.Type: ApplicationFiled: April 10, 2024Publication date: May 22, 2025Inventors: David John Kenneth Meadowcroft, Seng-Kum Chan, Han Peng Goh, Gary Fong Kem Goon, Sheng Zhang, Jack YuChieh Chung
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Publication number: 20250164723Abstract: An apparatus for supporting two fiber array unit (FAU) connectors in alignment with respective lenses of a photonics integrated circuit (PIC) includes a frame with a pair of arm sections joined with two side sections of a bottom section. The pair of arm sections is configured to parallelly insert in a package structure associated with a PIC chip to make the frame in a floating state. The bottom section provides a first support surface to support two aligners disposed respectively along the two side sections from top. Each aligner provides a semi-confined open space to receive a shelf extended out from a side edge of a PIC chip. The shelf is characterized by an alignment feature associated with a lens of the PIC chip. The semi-confined open space allows a body of a FAU connector to be loaded from top onto the shelf and be aligned with the lens based on the alignment feature.Type: ApplicationFiled: April 10, 2024Publication date: May 22, 2025Inventors: David Meadowcroft, Near Margalit, Gary Fong Kem Goon, Hari Potluri, Han Peng Goh, Sheng Zhang
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Publication number: 20250148730Abstract: An electronic device may have a camera and a display. The display may be configured to display virtual reality content for a user in which no real-world content from the camera is displayed or mixed reality content in which a combination of real-world content from the camera and overlaid virtual reality content is displayed. Control circuitry in the device may adjust the display and camera while transitioning between virtual reality and mixed reality modes. The control circuitry may reconfigure the camera to exhibit a desired frame rate immediately upon transitioning from virtual reality mode to mixed reality mode. Transitions between modes may be accompanied by smooth transitions between frame rates to avoid visible artifacts on the display. The camera frame rate may be synchronized to the display frame rate for at least part of the transition between the virtual reality and mixed reality modes.Type: ApplicationFiled: January 10, 2025Publication date: May 8, 2025Inventors: Sheng Zhang, Aleksandr M. Movshovich, Arthur Y. Zhang, Chaohao Wang, Moinul H. Khan, Paolo Sacchetto, Yunhui Hou
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Patent number: 12293740Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. A plurality of lenticular lenses may extend across the length of the display. The lenticular lenses may be configured to enable stereoscopic viewing of the display such that a viewer perceives three-dimensional images. Crosstalk between viewing zones and disparity between images received from different viewing zones may result in disparity-caused shifts in images perceived by viewer of the lenticular display. To mitigate these disparity-caused shifts, compensation circuitry may be included in the display pipeline circuitry. The compensation circuitry may include stored disparity-caused shift calibration information that is used for the compensation. The stored disparity-caused shift calibration information may be a polynomial function that outputs a magnitude of disparity-caused shift for a given pixel location.Type: GrantFiled: November 30, 2022Date of Patent: May 6, 2025Assignee: Apple Inc.Inventors: Ping-Yen Chou, ByoungSuk Kim, Fu-Chung Huang, Hao Chen, Juan He, Jun Qi, Mingming Wang, Sheng Zhang, Yang Li, Yi Huang, Yi-Pai Huang, Yunhui Hou
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Publication number: 20250135304Abstract: A golf bag trolley with an extendable frame, comprising a front wheel set, a left rear wheel set, a right rear wheel set, a handlebar set, a frame, a connecting base, an upper bag support and a lower bag support. The front wheel set is installed at the lower bag support, the left rear wheel set is installed on the connecting base, the right rear wheel set is installed on the connecting base, the frame comprises an upper tube and a lower tube, the upper tube has a smaller outer diameter than the lower tube, the upper tube is inserted into the lower tube, the lower bag support is installed at the lower tube, the handlebar set is installed at the upper tube, the upper bag support is installed on the upper tube, and a locking mechanism is arranged between the lower tube and the upper tube.Type: ApplicationFiled: June 16, 2023Publication date: May 1, 2025Applicant: NINGBO WENTAI SPORT EQUIPMENT CO., LTD.Inventor: Sheng ZHANG
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Publication number: 20250141178Abstract: Novel tools and techniques are provided for implementing a semiconductor or optical engine package, and more particularly methods, systems, and apparatuses are provided for implementing a semiconductor package including a dummy die coupled to a top surface of a fan-out wafer comprising an electronic die and coupled to a side of a photonic die. In various embodiments, an apparatus includes a first layer comprising an electronic die. A photonic die can be stacked on and coupled to the electronic die and a dummy die can be coupled to a first side of the photonic die and coupled to the first layer.Type: ApplicationFiled: October 30, 2023Publication date: May 1, 2025Inventors: Sukeshwar Kannan, Sheng Zhang, Near Margalit
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Patent number: 12283996Abstract: A method, system and apparatus for mapping a symbol from a N-QAM constellation into a binary bit set, where N is the number of symbols in the constellation, and reducing the length of the binary bit set according to at least one property of nonlinear distortion by generating a lookup table (LUT) address from a LUT address generator, and adding the LUT address to a LUT of size smaller than N{circumflex over (?)}(2M+1), where 2M is the number of neighboring symbols to be stored.Type: GrantFiled: January 19, 2023Date of Patent: April 22, 2025Assignee: CISCO TECHNOLOGY, INC.Inventors: Hongbin Zhang, Sheng Zhang, Tymon Barwicz
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Patent number: 12283258Abstract: An electronic device uses a leader synchronize signal generator to synchronize clock signal generators used by multiple components in the electronic device to a common time-base. A processor core complex of the electronic device sends per-frame configuration to a timing controller for frames to be displayed on an electronic display before a corresponding frame begins.Type: GrantFiled: March 9, 2023Date of Patent: April 22, 2025Assignee: Apple Inc.Inventors: Yung-Chin Chen, Hopil Bae, Mahdi Farrokh Baroughi, Sheng Zhang, Yanghyo Kim, Young Don Bae
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Patent number: 12278210Abstract: Provided is a manufacturing method of a semiconductor structure. The manufacturing method includes the following steps. A first dielectric layer is formed on a first substrate. A second dielectric layer is formed on a second substrate. A first heat treatment is performed on the first dielectric layer and the second dielectric layer, wherein a temperature of the first heat treatment is between 300° C. and 400° C. A first conductive via is formed in the first dielectric layer. A second conductive via is formed in the second dielectric layer. The first substrate and the second substrate are bonded in a manner that the first dielectric layer faces the second dielectric layer, so as to connect the first conductive via and the second conductive via.Type: GrantFiled: August 8, 2022Date of Patent: April 15, 2025Assignee: United Microelectronics Corp.Inventors: Sheng Zhang, Kai Zhu, Chien-Kee Pang, Chia-Liang Liao
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Patent number: 12266578Abstract: A chips bonding auxiliary structure includes a first chip, an auxiliary pattern and a second chip. The first chip has a first surface. The auxiliary pattern is form on the first surface. The second chip has a second surface bonding to the first surface to form at least one gap space surrounding the auxiliary pattern.Type: GrantFiled: August 22, 2022Date of Patent: April 1, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Sheng Zhang, Chien-Kee Pang, Xin Zhao
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Publication number: 20250086350Abstract: This invention discloses a method for comprehensively apportioning the source contribution to fine particular matter (PM2.5) based on the receptor model and the chemical transport model, which comprises the receptor model calculation steps, chemical transport model calculation steps and comprehensive source apportionment steps; the said comprehensive source apportionment step comprises the following sub-steps: according to the principle of inverse proportionality between uncertainty and weight coefficient, the first (receptor model) uncertainty and the second (chemical transport model) uncertainty are normalized to obtain their respective weight coefficients; the comprehensive source apportionment results are calculated based on the apportionment results of the receptor model and the chemical transport model, and their respective weight coefficient.Type: ApplicationFiled: June 26, 2024Publication date: March 13, 2025Inventors: Zhenliang LI, Yunqing CAO, Yuhong QIAO, Chao PENG, Weikai FANG, Xiaochen WANG, Linfeng DUAN, Mulan CHEN, Min DU, Sheng ZHANG
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Patent number: 12249607Abstract: Provided are a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a carrier substrate, a trap-rich layer, a dielectric layer, an interconnect structure, a device structure layer and a circuit structure. The trap-rich layer is disposed on the carrier substrate. The dielectric layer is disposed on the trap-rich layer. The interconnect structure is disposed on the dielectric layer. The device structure layer is disposed on the interconnect structure and electrically connected to the interconnect structure. The circuit structure is disposed on the device structure layer and electrically connected to the device structure layer.Type: GrantFiled: January 11, 2023Date of Patent: March 11, 2025Assignee: United Microelectronics Corp.Inventors: Sheng Zhang, Chunyuan Qi, Xingxing Chen, Chien-Kee Pang
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Publication number: 20250078546Abstract: A system and method of fine-grained image category discovery with few human annotations includes a camera and a trained machine learning model, which predicts a label for an object in a captured image and outputs the predicted label. The machine learning model is trained by contrastive affinity learning, including retrieving images having an object, a warm-up stage in which semi-supervised contrastive learning is performed based on projected features of a class token and an ensembled prompt, respectively. In a contrastive affinity learning stage, a student model and an exponentially moving averaged teacher model are forwarded with different augmented views of the retrieved images. Teacher embeddings are enqueued into a token-specific memory. A semi-supervised contrastive loss is computed on a current batch and a contrastive affinity learning loss for student embeddings and the teacher embeddings with pseudo-labels from a affinity graph dynamically generated by semi-supervised affinity generation.Type: ApplicationFiled: September 5, 2023Publication date: March 6, 2025Applicant: Mohamed bin Zayed University of Artificial IntelligenceInventors: Sheng ZHANG, Salman KHAN, Zhiqiang SHEN, Muzammal NASEER, Guangyi CHEN, Fahad KHAN
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Publication number: 20250054225Abstract: An effect video determining method, an effect video determining apparatus, an electronic device, and a storage medium are provided by embodiments of the present disclosure. The method includes: obtaining an uploaded image in response to an effect trigger operation; determining, according to position information of a capturing device, a target perspective image from a 3D image surrounding scenario corresponding to the uploaded image; and generating and displaying an effect video frame based on the target perspective image and a target object, until receiving an operation to stop capturing an effect video.Type: ApplicationFiled: October 29, 2024Publication date: February 13, 2025Inventors: Jiajun CHEN, Yunhao LIAO, Huaiye SHEN, Sheng ZHANG, Shen WU
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Patent number: 12217319Abstract: A method of interfacing a discrete digital workshop information system is provided, where the information system includes mutual integration among product lifecycle management (PLM), enterprise resource planning (ERP), a manufacturing execution system (MES), an energy management system (EMS), and a warehouse management system (WMS) of a finished product. A method of interfacing based on a data dictionary fusing different function datasets is proposed to solve the problems of a current discrete industry information system, such as single in function, a small amount of integrated information, a large number of “information islands” existing, incapable of achieving full-process informatization management and control, difficulty in product quality tracing and the like. By the method, it is possible to realize flexible production in a discrete manufacturing industry, precise management and control of a production process, significant improvement in product quality and significant reduction in operating costs.Type: GrantFiled: February 7, 2024Date of Patent: February 4, 2025Assignees: Machinery Technology Development Co., Ltd, Instrumentation Technology And Economy InstituteInventors: Sheng Zhang, Bin Xu, Hua Zhao, Dan Liu, Junguang Tan, Jian Jiao, Yedan Na, Pengfei Niu
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Patent number: 12216461Abstract: An Automated Guided Vehicle (AGV) scheduling method based on a narrow alley, electronic equipment and a storage medium are provided, and the method includes: through an AGV scheduling system, receiving a message that a to-be-driven-in AGV arrives at a driving-in platform, obtaining job information of each AGV in the narrow alley at the current moment, and determining whether the to-be-driven-in AGV can enter the narrow alley for performing the job fully according to the number of the AGVs in the narrow alley at the current moment, the job information and a loading/unloading position where the to-be-driven-in AGV will perform the job, so as to achieve concurrent collaborative job of the AGVs as many as possible in a confined workspace by making use of fragmented time and every bit of time, to form an efficient and flexible distribution solution, and to further achieve intelligent scheduling of the AGVs.Type: GrantFiled: February 7, 2024Date of Patent: February 4, 2025Assignee: Machinery Technology Development Co., LtdInventors: Sheng Zhang, Haoyuan Qu, Peng Zhao, Bin Xu, Yang Liu, Changchen Li