Patents by Inventor Sheng Zheng

Sheng Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11694955
    Abstract: A device comprises a first dielectric layer, a first conductor, a carbon-containing etch stop layer, a second dielectric layer, and a second conductor. The first conductor has a lower portion in the first dielectric layer. The carbon-containing etch stop layer wraps an upper portion of the first conductor. The second dielectric layer is over the carbon-containing etch stop layer. An interface formed by the second dielectric layer and the carbon-containing etch stop layer is higher over the first conductor than over the first dielectric layer. The second conductor is in the second dielectric layer.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: July 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Patent number: 11513111
    Abstract: Described herein are systems and methods for evaluating and mitigating the wax risks of a given hydrocarbon composition such as crude oil. The disclosed systems and methods enable rapid and ready prediction of wax risks using algorithms based on a small sample of the hydrocarbon composition. The wax risks are predicted using predictive models developed from machine learning. The disclosed systems and methods include mitigation strategies for wax risks that can include chemical additives, operation changes, and/or hydrocarbon blend.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: November 29, 2022
    Assignee: BL Technologies, Inc.
    Inventors: Nimeshkumar Kantilal Patel, Hitesh Ghanshyam Bagaria, Guoliang Wang, Xiaoan Xie, Xiao Zhang, Yun Peng, Wenqing Peng, Sheng Zheng, John Brian McDermott, Peter Larry Perez Diaz
  • Publication number: 20210225765
    Abstract: A device comprises a first dielectric layer, a first conductor, a carbon-containing etch stop layer, a second dielectric layer, and a second conductor. The first conductor has a lower portion in the first dielectric layer. The carbon-containing etch stop layer wraps an upper portion of the first conductor. The second dielectric layer is over the carbon-containing etch stop layer. An interface formed by the second dielectric layer and the carbon-containing etch stop layer is higher over the first conductor than over the first dielectric layer. The second conductor is in the second dielectric layer.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 22, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng ZHENG, Chih-Lin WANG
  • Patent number: 10978389
    Abstract: A device includes a first dielectric layer, a first conductor, a second dielectric layer, a second conductor, and an etch stop layer. The first conductor is in the first dielectric layer. The second dielectric layer is over the first dielectric layer. The second conductor is in the second dielectric layer and electrically connected to the first conductor. The second conductor has a first portion over a top surface of the first conductor and a second portion extending downwards from the first portion and around the first conductor. The etch stop layer has a first portion between the second portion of the second conductor and the first dielectric layer and a second portion between the first dielectric layer and the second dielectric layer. A top surface of the first portion of the etch stop layer is lower than a top surface of the second portion of the etch stop layer.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: April 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Patent number: 10651235
    Abstract: A first MRAM set includes a first transistor and a second transistor. The first transistor includes a first gate structure, a first source/drain doping region and a first common source/drain doping region. The second transistor includes a second gate structure, a second source/drain doping region and the first common source/drain doping region. A second MTJ is disposed on the second transistor. The first common source/drain doping region electrically connects to the second MTJ. A first MTJ is disposed on the first transistor. The sizes of the first MTJ and the second MTJ are different. The second MTJ connects to the first MTJ in series. A bit line electrically connects the first MTJ. A source line electrically connects to the first source/drain doping region and the second source/drain doping region.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: May 12, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Jhen-Siang Wu, Po-Chun Yang, Yung-Ching Hsieh, Zong-Sheng Zheng, Jian-Jhong Chen, Jen-Yu Wang, Cheng-Tung Huang
  • Publication number: 20200111740
    Abstract: A device includes a first dielectric layer, a first conductor, a second dielectric layer, a second conductor, and an etch stop layer. The first conductor is in the first dielectric layer. The second dielectric layer is over the first dielectric layer. The second conductor is in the second dielectric layer and electrically connected to the first conductor. The second conductor has a first portion over a top surface of the first conductor and a second portion extending downwards from the first portion and around the first conductor. The etch stop layer has a first portion between the second portion of the second conductor and the first dielectric layer and a second portion between the first dielectric layer and the second dielectric layer. A top surface of the first portion of the etch stop layer is lower than a top surface of the second portion of the etch stop layer.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 9, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng ZHENG, Chih-Lin WANG
  • Publication number: 20200033317
    Abstract: Described herein are systems and methods for evaluating and mitigating the wax risks of a given hydrocarbon composition such as crude oil. The disclosed systems and methods enable rapid and ready prediction of wax risks using algorithms based on a small sample of the hydrocarbon composition. The wax risks are predicted using predictive models developed from machine learning. The disclosed systems and methods include mitigation strategies for wax risks that can include chemical additives, operation changes, and/or hydrocarbon blend.
    Type: Application
    Filed: April 10, 2017
    Publication date: January 30, 2020
    Inventors: Nimeshkumar Kantilal PATEL, Hitesh Ghanshyam BAGARIA, Guoliang WANG, Xiaoan XIE, Xiao ZHANG, Yun PENG, Wenqing PENG, Sheng ZHENG, John Brian MCDERMOTT, Peter Larry PEREZ DIAZ
  • Patent number: 10504833
    Abstract: An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, and a second dielectric layer. The first conductor is partially in the first dielectric layer and having a portion protruding from the first dielectric layer. The etch stop layer is on the first dielectric layer and covering the protruding portion of the first conductor. The second dielectric layer is on the etch stop layer. A bottom surface of the second dielectric layer has a portion in a position lower than a top of the first conductor.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: December 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Patent number: 10444257
    Abstract: A high-precision magnetic suspension accelerometer for measuring the linear acceleration of a spacecraft is provided, comprising a magnetically shielded vacuum chamber system, a magnetic displacement sensing system, a magnetic suspension control system and a small magnetic proof mass. A optical coherence displacement detection technique is utilized for precisely measuring the position and the posture of the small magnetic proof mass in real time, and a magnetic suspension control technique is utilized for precisely controlling the position and the posture of the small magnetic proof mass to be brought back to the origin, so as to keep the small magnetic proof mass in the center of the systemic inner chamber. When the spacecraft is subject to a non-conservative force, the magnitude and direction of the acceleration can be precisely measured via the measurement of currents in the position control coils due to the acceleration of the spacecraft proportional to the currents of the position control coils.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: October 15, 2019
    Assignee: CHINA THREE GORGES UNIVERSITY
    Inventors: Liqing Pan, Xianwei Yang, Zhihui Luo, Hua Zhao, Mingxue Shao, Qiongying Ren, Chao Tan, Min Liu, Chao Wang, Chao Zhang, Sheng Zheng, Hongguang Piao, Guangduo Lu, Yunli Xu, Xiufeng Huang
  • Patent number: 10177647
    Abstract: A direct current controller includes a rectifier configured to convert alternating current input into a direct current output. A converter electrically coupled to the rectifier generates a converted direct current voltage that regulates a converted direct current from the direct current output of the rectifier and synthesizes an ac component of an alternating current grid to counteract an induced back-emf. A direct current controller central controller coupled to the converter regulates the converted direct current.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: January 8, 2019
    Assignee: UT-BATTELLE, LLC
    Inventors: Fei (Fred) Wang, Burak Ozpineci, Sheng Zheng, Steven L. Campbell, Madhu Sudhan Chinthavali, Aleksandar D. Dimitrovski, Philip R. Irminger, Omer C. Onar, Larry E. Seiber, Leon M. Tolbert, Clifford P. White, Daniel J. Costinett, Zhi Li, Jingxin Wang, Fei Yang
  • Publication number: 20180174962
    Abstract: An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, and a second dielectric layer. The first conductor is partially in the first dielectric layer and having a portion protruding from the first dielectric layer. The etch stop layer is on the first dielectric layer and covering the protruding portion of the first conductor. The second dielectric layer is on the etch stop layer. A bottom surface of the second dielectric layer has a portion in a position lower than a top of the first conductor.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 21, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng ZHENG, Chih-Lin WANG
  • Patent number: 9911691
    Abstract: An interconnection structure includes a first dielectric layer, at least one first conductor, and an etch stop layer. The first conductor is disposed partially in the first dielectric layer and has a portion protruding from the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and covers the protruding portion of the first conductor. The etch stop layer has a cap portion on a top surface of the protruding portion of the first conductor and a spacer portion on at least one sidewall of the protruding portion of the first conductor, and the spacer portion is thicker than the cap portion.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: March 6, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Patent number: 9806448
    Abstract: An electrical connector includes an insulating housing, first terminals, second terminals and a shielding shell. The insulating housing has a base portion and a mating portion, and the base portion has a mounting surface. The first terminals have a pair of differential signal terminals, a power terminal, and a grounding terminal, and the second terminals having the same type of terminals. The power terminal and the grounding terminal are disposed at two opposite sides of the pair of differential signal terminals, respectively. The first terminals and the second terminals have connecting legs extending out of the mounting face. The connecting legs of the power terminals and the grounding terminals are disposed at the middle area of the mounting surface, and the connecting legs of the differential signal terminals are respectively disposed at two opposite sides of the connecting legs of the power terminals and the grounding terminals.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: October 31, 2017
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Kai-Gang Yu, Chun-Ming Yu, Guo-Hua Zhang, Qi-Sheng Zheng
  • Patent number: 9780025
    Abstract: An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, a second dielectric layer, and a second conductor. The first dielectric layer has at least one hole therein. The first conductor is disposed at least partially in the hole of the first dielectric layer. The etch stop layer is disposed on the first dielectric layer. The etch stop layer has an opening to at least partially expose the first conductor. The second dielectric layer is disposed on the etch stop layer and has at least one hole therein. The hole of the second dielectric layer is in communication with the opening of the etch stop layer. The second conductor is disposed at least partially in the hole of the second dielectric layer and is electrically connected to the first conductor through the opening of the etch stop layer.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: October 3, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng Zheng, Chih-Lin Wang
  • Publication number: 20170242050
    Abstract: A high-precision magnetic suspension accelerometer for measuring the linear acceleration of a spacecraft is provided, comprising a magnetically shielded vacuum chamber system, a magnetic displacement sensing system, a magnetic suspension control system and a small magnetic proof mass. A optical coherence displacement detection technique is utilized for precisely measuring the position and the posture of the small magnetic proof mass in real time, and a magnetic suspension control technique is utilized for precisely controlling the position and the posture of the small magnetic proof mass to be brought back to the origin, so as to keep the small magnetic proof mass in the center of the systemic inner chamber. When the spacecraft is subject to a non-conservative force, the magnitude and direction of the acceleration can be precisely measured via the measurement of currents in the position control coils due to the acceleration of the spacecraft proportional to the currents of the position control coils.
    Type: Application
    Filed: February 17, 2017
    Publication date: August 24, 2017
    Applicant: CHINA THREE GORGES UNIVERSITY
    Inventors: Liqing PAN, Xianwei YANG, Zhihui LUO, Hua ZHAO, Mingxue SHAO, Qiongying REN, Chao TAN, Min LIU, Chao WANG, Chao ZHANG, Sheng ZHENG, Hongguang PIAO, Guangduo LU, Yunli XU, Xiufeng HUANG
  • Patent number: 9735487
    Abstract: A card connector includes an insulative housing, a plurality of contacts received in the insulative housing and a metallic cover covering the insulative housing. The contact includes a retaining portion, an extending portion horizontally and forwardly extending from the retaining portion, a connecting portion downwardly and forwardly aslant extending from the extending portion, a floating portion downwardly from the connecting portion and a contacting portion further downwardly extending from the floating portion. There are two bending points on linking portions of the connecting portion connecting with the floating portion and the extending portion, respectively. By such arrangement, when the electrical card is inserted, the contact can rotate about the two bending points in turn, that can improve an elasticity of the contact.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: August 15, 2017
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Ding-Bing Fan, Ce Jiang, Ji-Chao Wang, Guo-Hua Zhang, Qi-Sheng Zheng
  • Publication number: 20170199870
    Abstract: Disclosed herein is a method for an automatic translation of input characters in the field of information input, which solves the low-efficiency problem in existing technologies for translating input characters. This method comprises: obtaining a translation command to translate characters entered in a first language; based on the language setting of the input interface for receiving first language input characters, determining a second language; and translating the characters entered in the first language into corresponding characters in the second language. By automatically determining the target language based on the input interface for receiving first language characters, the present invention allows for a rapid translation of input characters, a reduction in user operations, enhanced translation efficiency and improved user experiences.
    Type: Application
    Filed: May 17, 2016
    Publication date: July 13, 2017
    Inventors: Sheng ZHENG, Meng WANG
  • Patent number: 9627900
    Abstract: A power adapter comprises a cover and a printed circuit board module received in the cover. The cover has a base and an upper cover covering the base, the base has a bottom wall and a plurality of side walls surrounding the bottom wall, the bottom wall and the side walls form a receiving space for receiving the printed circuit board module. The cover has a plurality of latching members at the top of the side wall, the latching members are on both ends of the cover, the latching members are defined above the upper cover and extend to each other. The side walls comprise a first side wall with a rotatablely movable block, the latching member is defined at the top of the movable block, the latching member moves outward with the movable block rotating.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: April 18, 2017
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Zhi-Wen Zhu, Ling-Jie Meng, Qi-Sheng Zheng, Chun-Ming Yu
  • Publication number: 20170098605
    Abstract: An interconnection structure includes a first dielectric layer, at least one first conductor, and an etch stop layer. The first conductor is disposed partially in the first dielectric layer and has a portion protruding from the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and covers the protruding portion of the first conductor. The etch stop layer has a cap portion on a top surface of the protruding portion of the first conductor and a spacer portion on at least one sidewall of the protruding portion of the first conductor, and the spacer portion is thicker than the cap portion.
    Type: Application
    Filed: December 14, 2016
    Publication date: April 6, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Sheng ZHENG, Chih-Lin WANG
  • Patent number: D1022911
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: April 16, 2024
    Assignee: Molex, LLC
    Inventors: You-Xiang Zheng, Hai-Sheng Luo