Abstract: A method including performing a first simulation for each of a plurality of different metrology target measurement recipes using a first model, selecting a first group of metrology target measurement recipes from the plurality of metrology target measurement recipes, the first group of metrology target measurement recipes satisfying a first rule, performing a second simulation for each of the metrology target measurement recipes from the first group using a second model, and selecting a second group of metrology target measurement recipes from the first group, the second group of metrology target measurement recipes satisfying a second rule, the first model being less accurate or faster than the second model and/or the first rule being less restrictive than the second rule.

Abstract: A method, a non-transitory computer-readable medium, and an apparatus for optimizing a design layout of an integrated circuit (IC) includes: selecting layout regions from a full-chip design layout for the IC; determining pixel images for the layout regions by performing pixel-based mask optimization for the layout regions, in which each pixel image corresponds to a respective layout region; determining a backpropagation (BP) artificial neural network (ANN) model using the pixel images and the layout regions; and determining a full-chip pixel image for the full-chip design layout using the BP ANN model, in which the BP ANN model uses the full-chip design layout as input.

Abstract: A method including performing a first simulation for each of a plurality of different metrology target measurement recipes using a first model, selecting a first group of metrology target measurement recipes from the plurality of metrology target measurement recipes, the first group of metrology target measurement recipes satisfying a first rule, performing a second simulation for each of the metrology target measurement recipes from the first group using a second model, and selecting a second group of metrology target measurement recipes from the first group, the second group of metrology target measurement recipes satisfying a second rule, the first model being less accurate or faster than the second model and/or the first rule being less restrictive than the second rule.

Abstract: A method, a non-transitory computer-readable medium, and an apparatus for optimizing a design layout of an integrated circuit (IC) includes: selecting layout regions from a full-chip design layout for the IC; determining pixel images for the layout regions by performing pixel-based mask optimization for the layout regions, in which each pixel image corresponds to a respective layout region; determining a backpropagation (BP) artificial neural network (ANN) model using the pixel images and the layout regions; and determining a full-chip pixel image for the full-chip design layout using the BP ANN model, in which the BP ANN model uses the full-chip design layout as input.