Abstract: An exemplary LED streetlamp installation seat and an LED lamp both has a seat body (1), which has a first accommodating chamber (11) and a second accommodating chamber (12) the first accommodating chamber (11) being used to accommodate a control device (7) for controlling the LED streetlamp and the second accommodating chamber (12) being used to accommodate a fixing device (8) for installing the LED lamp to a lamp-post; and a cover cap, corresponding to the first and the second accommodating chambers (11, 12), which has a first cap (21) and a second cap (22), the first cap (21) and the second cap (22) being hinge-joined. The first cap (21), corresponding to the first accommodating chamber (11), is detachably connected to the first accommodating chamber (11). The second cap (22), corresponding to the second accommodating chamber (21), is detachably connected to the second accommodating chamber (21).

Abstract: An input signal processing system is described. It comprises a first transconductance device having a first input, second input, and an output, wherein the first input is coupled to receive the input signal; a first resistor coupled to a first input of the first transconductance device, wherein the first resistor converts the input current signal to an input voltage signal; a first voltage-current converter coupled to the output, the second input, the resistor, and a low voltage supply, wherein the first voltage-current converter is operative for converting the input voltage signal to a input current signal; and a low pass filter having an input coupled to the voltage converter for filtering noise from the input current signal.

Abstract: An input current channel device is described. This device comprises a first terminal for receiving a reference signal; a second terminal for receiving a first target signal; a pass through device coupled to the first terminal, the pass through device operative for transmitting a delayed reference signal in response to receiving the reference signal; a first combination logic device coupled to the first terminal and the second terminal, the first combination logic device operative for transmitting a first combination logic signal in response to receiving the reference signal and the first target signal; a selection device coupled for receiving the delayed reference signal, the first combination logic signal, and a first synchronization signal, the selection device operative for selectively transmitting a second synchronization signal, and wherein selectively transmitting the second synchronization signal reduces skew between the reference channel and the first target channel.

Abstract: A current gain control system is described and comprises first and second gain blocks respectively associated with the first and second input channels, wherein first and second gain blocks transmit first and second gain signals in response to receiving first and second input signals; first and second converters adapted to be respectively coupled to the first and second gain blocks, the first and second converters operative for setting gains associated with the first and second input channel and for transmitting first and second converted signals in response to receiving the first and second gain signals; and first and second switches for selectively coupling the first and second converters to first and second channel drivers, respectively, wherein the first and second channel drivers transmit channel gain signals in response to receiving the first converted signal, and the channel gain signal allows control of the gain associated with the input channel.

Abstract: An over current protection device is described. It includes a plurality of input channels for receiving an input signal; a plurality of low pass filters coupled to a first group of the plurality of input channels, wherein each low pass filter is associated with one input channel within the first group of input channels, the plurality of low pass filters operative for removing spikes in associated with the input signal; and a plurality of digital to analog converters coupled to a second group of the plurality of input channels, wherein each digital to analog converter is associated with one low pass filter in the second group of input channels, the digital to analog converters operative for triggering over current protection when a signal received from the associated low pass filter is beyond a preset level, wherein the over current protection device is on chip with the laser diode driver.

Abstract: A modulation control system for use with a high frequency modulator is described. This system comprises a latch for selectively receiving enable signals, wherein the latch transmits a latched signal in response to receiving at least two of the enable signals; a selection device coupled to the latch for receiving the latched signal, a voltage source, and a terminal for receiving at least one of the enable signals, wherein the selection device transmits a selected signal; and a logic device coupled to the selection device and a terminal for receiving a modulated enable signal, wherein the logic device transmits a synchronized signal for either enabling or disabling the high frequency modulator in response to receiving the selected signal associated with at least one of the enable signals.

Abstract: Laser diode driver architectures are disclosed. Some example current drivers are described, including a current channel to provide an output current. The current channel includes a current mirror with emitter degeneration, a startup transistor coupled to the current mirror to generate a DC bias on the current mirror, a beta helper circuit coupled to the current mirror and the startup transistor, to maintain the DC bias on the current mirror, and a cutoff transistor coupled to an emitter terminal of a current mirror transistor and to a reference voltage, to selectively couple the emitter terminal to the reference voltage to conduct the pre-determined output current. The example current drivers also include an output stage coupled to the output of the current mirror and to an output device, wherein the output stage provides a current gain in response to the cutoff transistor coupling the emitter terminal to the reference voltage.

Abstract: An optical disk drive system associated with a laser diode is described. The optical disk drive system comprises a current generator for receiving input signals; a current switch coupled to receive timing signals; a current driver coupled to receive output signals from the current switch and the current generator, the current driver further comprising a driver with wave shape control selected from the group consisting of a laser diode read driver and a laser diode write driver, wherein the driver with shape control is operative for transmitting at least one output signal that is a scaled version of at least one of the output signals received from the current generator, wherein the current driver is operative for transmitting at least one output signal driving the laser diode.

Abstract: An input signal processing system is described. It comprises a first transconductance device having a first input, second input, and an output, wherein the first input is coupled to receive the input signal; a first resistor coupled to a first input of the first transconductance device, wherein the first resistor converts the input current signal to an input voltage signal; a first voltage-current converter coupled to the output, the second input, the resistor, and a low voltage supply, wherein the first voltage-current converter is operative for converting the input voltage signal to a input current signal; and a low pass filter having an input coupled to the voltage converter for filtering noise from the input current signal.

Abstract: A high frequency modulator is described. It comprises: a first converter for receiving a constant current signal and transmitting a first converted signal; an adder coupled the first converter and operative for transmitting a summed signal in response to receiving the first converted signal and selectively receiving a triangular signal; a first oscillator coupled to the adder for receiving the summed signal, the first oscillator operative for transmitting a time varying current signal; a second converter coupled to the first oscillator for receiving the time varying current signal and operative for transmitting a second converted signal; and an output device selectively coupled to the second converter and operative for transmitting an output signal in response to receiving either the second converted signal or an offset signal.

Abstract: An input current channel device is described. This device comprises a first terminal for receiving a reference signal; a second terminal for receiving a first target signal; a pass through device coupled to the first terminal, the pass through device operative for transmitting a delayed reference signal in response to receiving the reference signal; a first combination logic device coupled to the first terminal and the second terminal, the first combination logic device operative for transmitting a first combination logic signal in response to receiving the reference signal and the first target signal; a selection device coupled for receiving the delayed reference signal, the first combination logic signal, and a first synchronization signal, the selection device operative for selectively transmitting a second synchronization signal, and wherein selectively transmitting the second synchronization signal reduces skew between the reference channel and the first target channel.

Abstract: A current gain control system is described and comprises first and second gain blocks respectively associated with the first and second input channels, wherein first and second gain blocks transmit first and second gain signals in response to receiving first and second input signals; first and second converters adapted to be respectively coupled to the first and second gain blocks, the first and second converters operative for setting gains associated with the first and second input channel and for transmitting first and second converted signals in response to receiving the first and second gain signals; and first and second switches for selectively coupling the first and second converters to first and second channel drivers, respectively, wherein the first and second channel drivers transmit channel gain signals in response to receiving the first converted signal, and the channel gain signal allows control of the gain associated with the input channel.

Abstract: A modulation control system for use with a high frequency modulator is described. This system comprises a latch for selectively receiving enable signals, wherein the latch transmits a latched signal in response to receiving at least two of the enable signals; a selection device coupled to the latch for receiving the latched signal, a voltage source, and a terminal for receiving at least one of the enable signals, wherein the selection device transmits a selected signal; and a logic device coupled to the selection device and a terminal for receiving a modulated enable signal, wherein the logic device transmits a synchronized signal for either enabling or disabling the high frequency modulator in response to receiving the selected signal associated with at least one of the enable signals.

Abstract: An over current protection device is described. It includes a plurality of input channels for receiving an input signal; a plurality of low pass filters coupled to a first group of the plurality of input channels, wherein each low pass filter is associated with one input channel within the first group of input channels, the plurality of low pass filters operative for removing spikes in associated with the input signal; and a plurality of digital to analog converters coupled to a second group of the plurality of input channels, wherein each digital to analog converter is associated with one low pass filter in the second group of input channels, the digital to analog converters operative for triggering over current protection when a signal received from the associated low pass filter is beyond a preset level, wherein the over current protection device is on chip with the laser diode driver.

Abstract: Laser diode driver architectures are disclosed. Some example current drivers are described, including a current channel to provide an output current. The current channel includes a current mirror with emitter degeneration, a startup transistor coupled to the current mirror to generate a DC bias on the current mirror, a beta helper circuit coupled to the current mirror and the startup transistor, to maintain the DC bias on the current mirror, and a cutoff transistor coupled to an emitter terminal of a current mirror transistor and to a reference voltage, to selectively couple the emitter terminal to the reference voltage to conduct the pre-determined output current. The example current drivers also include an output stage coupled to the output of the current mirror and to an output device, wherein the output stage provides a current gain in response to the cutoff transistor coupling the emitter terminal to the reference voltage.

Abstract: An improved low-voltage, low-power, wide range, and linear Gm Cell is disclosed. In one embodiment, a method of linearizing output current with an input voltage using a Gm Cell includes receiving an input differential voltage by an emitter degenerated input stage and outputting a current including a linear part and a nonlinear part at signal output terminals Iout_P and Iout_M, converting the non-linear part of the output current to a voltage difference via a compression stage, converting the voltage difference to a linear output current by a linear voltage to current converter stage, outputting the linear output current using a current mirror output stage to the signal output terminals Iout_P and Iout_M, and summing the output currents of the emitter degenerated input stage and the current mirror output stage at the signal output terminals Iout_P and Iout_M to obtain a linear output current with the input differential voltage.

Abstract: A class-AB driver design with improved frequency response is disclosed. In one embodiment, the class-AB driver includes a push-pull output stage, a trans-linear loop, an input stage, a current biasing and enabling circuit. Further, the trans-linear loop is coupled to a signal input terminal ABIN via node A, and the push-pull output stage is coupled to the trans-linear loop via node B and node C. Further, the trans-linear loop includes a speed balancing resistor RB in a faster signal traveling path (i.e., ABIN to ABOUT via node A and B) to match up the speed with a slower signal traveling path (i.e., ABIN to ABOUT via node A and C). In another embodiment, the MOS transistors are also used instead of the speed balancing resistor RB to balance the signal traveling time of the two signal traveling paths.

Abstract: An improved low-voltage, low-power, wide range, and linear Gm Cell is disclosed. In one embodiment, a method of linearizing output current with an input voltage using a Gm Cell includes receiving an input differential voltage by an emitter degenerated input stage and outputting a current including a linear part and a nonlinear part at signal output terminals Iout_P and Iout_M, converting the non-linear part of the output current to a voltage difference via a compression stage, converting the voltage difference to a linear output current by a linear voltage to current converter stage, outputting the linear output current using a current mirror output stage to the signal output terminals Iout_P and Iout_M, and summing the output currents of the emitter degenerated input stage and the current mirror output stage at the signal output terminals Iout_P and Iout_M to obtain a linear output current with the input differential voltage.

Abstract: A class-AB driver design with improved frequency response is disclosed. In one embodiment, the class-AB driver includes a push-pull output stage, a trans-linear loop, an input stage, a current biasing and enabling circuit. Further, the trans-linear loop is coupled to a signal input terminal ABIN via node A, and the push-pull output stage is coupled to the trans-linear loop via node B and node C. Further, the trans-linear loop includes a speed balancing resistor RB in a faster signal traveling path (i.e., ABIN to ABOUT via node A and B) to match up the speed with a slower signal traveling path (i.e., ABIN to ABOUT via node A and C). In another embodiment, the MOS transistors are also used instead of the speed balancing resistor RB to balance the signal traveling time of the two signal traveling paths.