Abstract: A display panel and a manufacturing method thereof are provided. The display panel includes a circuit substrate and a plurality of micro light-emitting diode structures. The micro light-emitting diode structures each include a micro light-emitting chip and a molding structure. The micro light-emitting chip is electrically bonded to the circuit substrate, and includes a first surface, a second surface, and a peripheral surface. The first surface is located on a side of the micro light-emitting chip facing the circuit substrate. The second surface is disposed opposite to the first surface. The peripheral surface connects the first surface and the second surface. The molding structure surrounds the peripheral surface and encloses the second surface of the micro light-emitting chip. The molding structure extends in a direction away from the circuit substrate and forms an inner side wall. The inner side wall and the second surface constitute an accommodating portion.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor having a semiconductor substrate comprising a front-side surface opposite a back-side surface. A plurality of photodetectors is disposed in the semiconductor substrate. An isolation structure extends into the back-side surface of the semiconductor substrate and is disposed between adjacent photodetectors. The isolation structure includes a metal core, a conductive liner disposed between the semiconductor substrate and the metal core, and a first dielectric liner disposed between the conductive liner and the semiconductor substrate. The metal core comprises a first metal material and the conductive liner comprises the first metal material and a second metal material different from the first metal material.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: A modulator heater structure may include a plurality of regions having different thicknesses. For example, a heater ring of the modulator heater structure may have a first thickness. A heater pad of the modulator heater structure, that is configured to provide an electrical current to the heater ring, may have a second thickness that is greater than the first thickness. The lesser thickness of the heater ring of the modulator heater structure provides high electrical resistance in the heater ring, which enables the heater ring to quickly and efficiently generate heat. The greater thickness of the heater pad provides low electrical resistance in the second region, which enables the electrical current to be efficiently provided through the heater pad to the heater ring with reduced heat dissipation in the hear pad due to the lower electrical current dissipation in the heater pad.

Abstract: A hydrogen generator essentially composed of a first medium is provided, comprising: a reforming zone, a preheating zone and a heat source. The reforming zone is used for containing a reforming catalyst so as to perform a steam reforming reaction of a hydrogen-producing raw material to generate hydrogen; and the heat source provides heat to the preheating zone and reforming zone, so that the hydrogen-producing raw material is firstly preheated in the preheating zone and then performs the steam reforming reaction in the reforming zone. The reforming zone and preheating zone are divided with a shortest interval of at least about 0.5 mm with the first medium, wherein the first medium has a thermal conductivity (K) of at least about 60 W/m-K.

Abstract: A metal-oxide-semiconductor device includes a substrate, a gate on the substrate, a source in the substrate and adjacent to one side of the gate, a drain in the substrate and adjacent to another side of the gate, a gate channel in the substrate and under the gate, and a gate insulator between the source and the drain and the gate and the gate channel, wherein the gate insulator has a substantially uneven thickness for use in electrostatic discharge (ESD) protection.

Abstract: An ESD protection device includes a substrate with a doped well of a first conductive type, a first and a second doping region of the first conductive type and a third and a fourth doping region of a second conductive type respectively disposed in the doped well, a first gate disposed on the substrate and between the first and the second doping region, and a second gate disposed on the substrate and between the second and the third doping region to determine the distance between the second and the third doping region in order to precisely adjust the breakdown voltage of the ESD protection device of the present invention.

Abstract: A high voltage device includes a semiconductor substrate and a gate. The semiconductor substrate includes a first doped region having a first conductive type, a second doped region having a second conductive type, a third doped region having the second conductive type, a fourth doped region surrounding the third doped region and having the second conductive type, and a fifth doped region surrounding the third doped region and having the second conductive type. The gate is disposed between two spacers to separate the second doped region from the third doped region, so as to control the conduction of the second doped region and the third doped region. In the high voltage device, the fifth doped region surrounds the third doped region, so as to strengthen the coverage for the third doped region and improve the ion concentration uniformity on the bottom of the third doped region to reduce leakage current.

Abstract: A high voltage device includes a semiconductor substrate and a gate. The semiconductor substrate includes a first doped region having a first conductive type, a second doped region having a second conductive type, a third doped region having the second conductive type, a fourth doped region surrounding the third doped region and having the second conductive type, and a fifth doped region surrounding the third doped region and having the second conductive type. The gate is disposed between two spacers to separate the second doped region from the third doped region, so as to control the conduction of the second doped region and the third doped region. In the high voltage device, the fifth doped region surrounds the third doped region, so as to strengthen the coverage for the third doped region and improve the ion concentration uniformity on the bottom of the third doped region to reduce leakage current.