Patents by Inventor Shenjian Liu

Shenjian Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11371141
    Abstract: Embodiments of the present disclosure disclose a plasma process apparatus with low particle contamination and a method of operating the same, wherein the plasma process apparatus comprises a chamber body and a liner, wherein a dielectric window is provided above the liner; the chamber body, the liner, and the dielectric window enclose a reaction space; a base for placing a wafer is provided at a bottom portion inside the reaction space; a vacuum pump device for pumping a gas out of the reaction space and maintaining a low pressure therein is provided below the base; a shutter for shuttering between an opening on a chamber body sidewall and an opening on a liner sidewall is provided inside the chamber body, for blocking contamination particles in the gas from flowing from a transfer module to the reaction space; a groove is provided at a lower portion of the liner, wherein a flowing space enclosed by a liner outer wall below the shutter and a chamber body inner wall is in communication with an inner space of t
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: June 28, 2022
    Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT INC. CHINA
    Inventors: Tuqiang Ni, Rason Zuo, Shenjian Liu, Xingjian Chen, Lei Wan
  • Patent number: 11348763
    Abstract: Disclosed is a corrosion-resistant structure for a gas delivery system in a plasma processing apparatus. By providing a plating layer of corrosion-resistant material at the parts including the gas channel to avoid reacting with the delivered corrosive gas, metal and particle contaminations are reduced. By reversely mounting nozzles such that they reliably cover the plating layer inside the gas outlet holes, the disclosure prevents the corrosion-resistant material from being damaged by the plasma generated inside the cavity. By forming a corrosion-resistant yttrium oxide coating at the surfaces of the nozzles exposed to the cavity, the disclosure prevents the plasma from eroding the nozzles. The disclosure further leverages a flexible corrosion-resistant material, such as Teflon, to the sealing surfaces of the liner in contact with the dielectric window and the cavity, which improves the overall sealing effect of the liner.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: May 31, 2022
    Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT INC. CHINA
    Inventors: Zengdi Lian, Rason Zuo, Dee Wu, Yu Guan, Xingjian Chen, Shenjian Liu, Tuqiang Ni
  • Publication number: 20200381213
    Abstract: Disclosed is a corrosion-resistant structure for a gas delivery system in a plasma processing apparatus. By providing a plating layer of corrosion-resistant material at the parts including the gas channel to avoid reacting with the delivered corrosive gas, metal and particle contaminations are reduced. By reversely mounting nozzles such that they reliably cover the plating layer inside the gas outlet holes, the disclosure prevents the corrosion-resistant material from being damaged by the plasma generated inside the cavity. By forming a corrosion-resistant yttrium oxide coating at the surfaces of the nozzles exposed to the cavity, the disclosure prevents the plasma from eroding the nozzles. The disclosure further leverages a flexible corrosion-resistant material, such as Teflon, to the sealing surfaces of the liner in contact with the dielectric window and the cavity, which improves the overall sealing effect of the liner.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 3, 2020
    Inventors: Zengdi LIAN, Rason ZUO, Dee WU, Yu GUAN, Xingjian CHEN, Shenjian LIU, Tuqiang NI
  • Publication number: 20190194802
    Abstract: Embodiments of the present disclosure disclose a plasma process apparatus with low particle contamination and a method of operating the same, wherein the plasma process apparatus comprises a chamber body and a liner, wherein a dielectric window is provided above the liner; the chamber body, the liner, and the dielectric window enclose a reaction space; a base for placing a wafer is provided at a bottom portion inside the reaction space; a vacuum pump device for pumping a gas out of the reaction space and maintaining a low pressure therein is provided below the base; a shutter for shuttering between an opening on a chamber body sidewall and an opening on a liner sidewall is provided inside the chamber body, for blocking contamination particles in the gas from flowing from a transfer module to the reaction space; a groove is provided at a lower portion of the liner, wherein a flowing space enclosed by a liner outer wall below the shutter and a chamber body inner wall is in communication with an inner space of t
    Type: Application
    Filed: December 19, 2018
    Publication date: June 27, 2019
    Inventors: Tuqiang NI, Rason ZUO, Shenjian LIU, Xingjian CHEN, Lei WAN
  • Publication number: 20190006155
    Abstract: The present disclosure provides a plasma reactor having a function of tuning low frequency RF power distribution, comprising: a reaction chamber in which an electrically conductive base is provided, the electrically conductive base being connected to a low frequency RF source via a first match, an electrostatic chuck being provided on the electrically conductive base, an upper surface of the electrostatic chuck being configured for fixing a to-be-processed substrate, an outer sidewall of the electrically conductive base being coated with at least one layer of plasma corrosion-resistance dielectric layer, a coupling ring made of a dielectric material surrounding an outer perimeter of the base, a focus ring being disposed above the coupling ring, the focus ring being arranged surround the electrostatic chuck and be exposed to a plasma during a plasma processing procedure; the plasma reactor further comprising an annular electrode that is disposed above the coupling ring but below the focus ring; a wire, a first
    Type: Application
    Filed: July 2, 2018
    Publication date: January 3, 2019
    Inventors: Kui Zhao, Shenjian Liu, Tuqiang Ni
  • Patent number: 9466502
    Abstract: A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer through the photoresist mask.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: October 11, 2016
    Assignee: Lam Research Corporation
    Inventors: Shih-Yuan Cheng, Shenjian Liu, Youn Gi Hong, Qian Fu
  • Publication number: 20160155643
    Abstract: A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer through the photoresist mask.
    Type: Application
    Filed: February 4, 2016
    Publication date: June 2, 2016
    Inventors: Shih-Yuan CHENG, Shenjian LIU, Youn Gi HONG, Qian FU
  • Patent number: 9263284
    Abstract: A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer through the photoresist mask.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: February 16, 2016
    Assignee: Lam Research Corporation
    Inventors: Shih-Yuan Cheng, Shenjian Liu, Youn Gi Hong, Qian Fu
  • Patent number: 8901004
    Abstract: A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: December 2, 2014
    Assignee: Lam Research Corporation
    Inventors: Tom Kamp, Qian Fu, I. C. Jang, Linda Braly, Shenjian Liu
  • Publication number: 20140248779
    Abstract: A method for forming lines in an etch layer on a substrate may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a photoresist mask, ionizing the UV producing gas to produce UV rays to irradiate the photoresist mask, and etching the lines into the etch layer through the photoresist mask.
    Type: Application
    Filed: May 15, 2014
    Publication date: September 4, 2014
    Inventors: Shih-Yuan CHENG, Shenjian LIU, Youn Gi HONG, Qian FU
  • Patent number: 8753804
    Abstract: A method for forming a photoresist mask may comprise providing a ultra-violet (UV) producing gas to a vacuum chamber having a substrate, ionizing the UV producing gas to produce UV rays to irradiate the substrate, and etching features into the substrate through the photoresist mask.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: June 17, 2014
    Assignee: Lam Research Corporation
    Inventors: Shih-Yuan Cheng, Shenjian Liu, Youn Gi Hong, Qian Fu
  • Patent number: 8609546
    Abstract: A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: December 17, 2013
    Assignee: Lam Research Corporation
    Inventors: Wonchul Lee, Qian Fu, Shenjian Liu, Bryan Pu
  • Patent number: 8585844
    Abstract: A method of installing a component of a plasma processing chamber by replacing a used component with a component made by forming a dual-layer green body and co-sintering the dual-layer green body so as to form a three-layer component. The three layer component comprises an outer layer of yttria, an intermediate layer of YAG, and a second outer layer of alumina. The component is installed such that the outer layer of yttria is exposed to the plasma environment when the chamber is in operation.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: November 19, 2013
    Assignee: Lam Research Corporation
    Inventors: Hong Shih, Duane Outka, Shenjian Liu, John Daugherty
  • Patent number: 8518282
    Abstract: A method for etching features of different aspect ratios in a tungsten containing layer is provided. An etch gas is provided containing a tungsten etch component and a deposition component. A plasma is formed from the provided etch gas. A tungsten containing layer patterned with wide and narrow features is etched with the provided plasma.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: August 27, 2013
    Assignee: Lam Research Corporation
    Inventors: Wonchul Lee, Qian Fu, Shenjian Liu, Bryan Pu
  • Patent number: 8440573
    Abstract: A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: May 14, 2013
    Assignee: Lam Research Corporation
    Inventors: Katrina Mikhaylichenko, Denis Syomin, Qian Fu, Glenn W. Gale, Shenjian Liu, Mark H. Wilcoxson
  • Publication number: 20120144640
    Abstract: A method of installing a component of a plasma processing chamber by replacing a used component with a component made by forming a dual-layer green body and co-sintering the dual-layer green body so as to form a three-layer component. The three layer component comprises an outer layer of yttria, an intermediate layer of YAG, and a second outer layer of alumina. The component is installed such that the outer layer of yttria is exposed to the plasma environment when the chamber is in operation.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 14, 2012
    Applicant: Lam Research Corporation
    Inventors: Hong Shih, Duane Outka, Shenjian Liu, John Daugherty
  • Patent number: 8124538
    Abstract: A method for selectively etching a high-k dielectric layer with respect to a polysilicon material is provided. The high-k dielectric layer is partially removed by Ar sputtering, and then the high-k dielectric layer is etched using an etching gas comprising BCl3. The high-k dielectric layer and the polysilicon material may be formed on a substrate. In order to partially remove the high-k dielectric layer, a sputtering gas containing Ar is provided into an etch chamber in which the substrate is placed, a plasma is generated from the sputtering gas, and then the sputtering gas is stopped. In order to etch the high-k dielectric layer, the etching gas is provided into the etch chamber, a plasma is generated from the etching gas, and then the etching gas is stopped.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: February 28, 2012
    Assignee: Lam Research Corporation
    Inventors: In Deog Bae, Qian Fu, Wonchul Lee, Shenjian Liu
  • Patent number: 8097105
    Abstract: Two methods of extending the lifetime of yttrium oxide as a plasma chamber material are provided. One method comprises making a three-layer component of a plasma processing chamber by co-sintering a dual-layer green body where one layer comprises ceramic particles and a second layer comprises yttria particles. The two layers are in intimate contact during the sintering process. In a preferred embodiment, the three layer component comprises an outer layer of yttria, an intermediate layer of YAG, and a second outer layer of alumina. Optionally, the disks are pressed together during the sintering process. The resulting three-layer component is very low in porosity. Preferably, the porosity of any of the outer layer of yttria, the intermediate layer of YAG, and the second outer layer of alumina, is less than 3%.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: January 17, 2012
    Assignee: Lam Research Corporation
    Inventors: Hong Shih, Duane Outka, Shenjian Liu, John Daugherty
  • Publication number: 20110281438
    Abstract: A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.
    Type: Application
    Filed: November 18, 2008
    Publication date: November 17, 2011
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Wonchul Lee, Qian Fu, Shenjian Liu, Bryan Pu
  • Publication number: 20110183522
    Abstract: A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Katrina Mikhaylichenko, Denis Syomin, Qian Fu, Glenn W. Gale, Shenjian Liu, Mark H. Wilcoxson