Abstract: A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.

Abstract: A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.

Abstract: Systems and methods are provided for adding digital film grain to images and videos displayed by a display of an electronic device. An image processing circuitry of the electronic device may include hardware, such as display pipeline hardware, memory-to-memory scaler and rotator (MSR) hardware, and/or other possible hardware, that enables generation of film grain templates based on characteristics of a target film grain, pseudo-randomly samples the programmable template to fetch film grain values, scales the film grain values, and combines the scaled film grain values with values of pixels in an image frame.

Abstract: Systems and methods are provided for using an optical crosstalk compensation (OXTC) block to compensate for optical crosstalk resulted from a combination of viewing angle change across field of view (FoV), color filter (CF) crosstalk, and the OLED various angle color shift (VACS) of a foveated electronic display. One or more two-dimensional (2D) OXTC factor maps are used to determine OXTC factors for input image data of the OXTC block, and the OXTC factors are updated on a per frame basis. Offset values are determined using a parallel architecture and used to determine the OXTC factors. Compensation weights are used to determine weighted OXTC factors to improve processing efficiency. Output image data are obtained by applying the weighted OXTC factors to the input image data.

Abstract: A compensation system includes a processor configured to determine compensated data for display on a sub-pixel of the display device. The processor may receive image data configured to be displayed on the sub-pixel, convert the gray level data to first voltage data; fetch, from a memory, compressed 1×1 sub-pixel uniformity compensation data for the sub-pixel, and decompress the compressed 1×1 sub-pixel uniformity compensation data via a decompressor. The decompressed data comprises the 1×1 sub-pixel uniformity compensation data for the sub-pixel. The processor may also determine a voltage compensation offset value associated with the sub-pixel based on the second voltage data, generate compensated voltage data based in part on the voltage compensation offset value and the first voltage data, convert the compensated voltage data to compensated gray level data; and transmit the compensated gray level data to pixel driving circuitry associated with the sub-pixel.

Abstract: It may be desirable to implement a vignetting effect in a display. The vignetting effect causes the display to have a light-emitting area that gradually fades to a black, non-light-emitting area. The vignetting effect allows for the size and shape of the light-emitting area to be controlled while still being aesthetically pleasing to a viewer. To implement a vignetting mask for the vignetting effect, control circuitry in the electronic device may apply dimming factors to image data for the display. To avoid artifacts caused by the vignetting mask, an initial array of dimming factors for implementing the vignetting mask may have a range between ?0.5 and 1.5. After upsampling, clamping may be performed to reduce the range of the dimming factors to between 0 and 1. Ultimately, the dimming factors are applied to image data for each frame to implement the vignetting mask in each frame.

Abstract: A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.

Abstract: A device for power estimation is disclosed. The device includes a transformer circuit coupled with a processing circuit and a transaction interface. The transformer circuit is configured to count performance activities executed in the processing circuit and to compare count values of the performance activities with a predetermined value to determine a power state of the processing circuit. The transaction interface is configured to receive a request from the processing circuit and record a first timestamp, and further configured to receive a response from a memory model and record a second timestamp, the transaction interface being further configured to record a time difference between the first timestamp and the second timestamp as a time difference. The transformer circuit is further configured to determine the power state of the processing circuit based on both of the count values and the time difference.

Abstract: A method is disclosed that includes providing an IP bank, an application bank, and a technology bank; generating a hierarchical table based on the IP bank and the application bank; performing an estimation of at least one of a performance value, a power value, an area value and a cost value, which corresponds to the hierarchical table, by using the technology bank, to output an result data as a basis of fabrication of a system.

Abstract: A device for power estimation is disclosed. The device includes a transformer circuit coupled with a processing circuit and a transaction interface. The transformer circuit is configured to count performance activities executed in the processing circuit and to compare count values of the performance activities with a pre-determined value to determine a power state of the processing circuit. The transaction interface is configured to receive a request from the processing circuit and record a first timestamp, and further configured to receive a response from a memory model and record a second timestamp, the transaction interface being further configured to record a time difference between the first timestamp and the second timestamp as a time difference. The transformer circuit is further configured to determine the power state of the processing circuit based on both of the count values and the time difference.

Abstract: Systems and methods for interpolating overdrive values using a lookup table to compensate for potential display artifacts. Interpolating includes applying a first interpolation type to a first portion of the lookup table when a point to be interpolated is in the first portion of the lookup table. However, interpolating includes applying a second interpolation type to a second portion of the lookup table when the point to be interpolated is in the second portion of the lookup table. The interpolated values are then used to drive pixels of a display panel.

Abstract: A power state transformer, a system and a method thereof are disclosed. The power state transformer is coupled with a processing unit model. The power state transformer is configured for counting performance activities executed in the processing unit model, and further for determining a power state of the processing unit model according to count values of the performance activities.

Abstract: Systems and methods for interpolating overdrive values using a lookup table to compensate for potential display artifacts. Interpolating includes applying a first interpolation type to a first portion of the lookup table when a point to be interpolated is in the first portion of the lookup table. However, interpolating includes applying a second interpolation type to a second portion of the lookup table when the point to be interpolated is in the second portion of the lookup table. The interpolated values are then used to drive pixels of a display panel.

Abstract: A method of estimating power consumption for a system on chip (SOC) includes simulating operation of a first sub-block to obtain power consumption information for the first sub-block including first activation information for a first IP block. The method further includes simulating operation of a second sub-block to obtain power consumption information for the second sub-block including second activation information for the first IP block and activation information for a plurality of second IP blocks. The method further includes determining a weighting factor for the first activation information for the first IP block, the second activation information for the first IP block and the activation information for each second IP block. The method further includes estimating power consumption for the SOC based on the first and second activation information for the first IP block, the activation information for at least one second IP block, and corresponding weighting factors.

Abstract: A power state transformer, a system and a method thereof are disclosed. The power state transformer is coupled with a processing unit model. The power state transformer is configured for counting performance activities executed in the processing unit model, and further for determining a power state of the processing unit model according to count values of the performance activities.

Abstract: A method of estimating power consumption for a system on chip (SOC) includes simulating operation of a first sub-block to obtain power consumption information for the first sub-block including first activation information for a first IP block. The method further includes simulating operation of a second sub-block to obtain power consumption information for the second sub-block including second activation information for the first IP block and activation information for a plurality of second IP blocks. The method further includes determining a weighting factor for the first activation information for the first IP block, the second activation information for the first IP block and the activation information for each second IP block. The method further includes estimating power consumption for the SOC based on the first and second activation information for the first IP block, the activation information for at least one second IP block, and corresponding weighting factors.

Abstract: A method is disclosed that includes providing an IP bank, an application bank, and a technology bank; generating a hierarchical table based on the IP bank and the application bank; performing an estimation of at least one of a performance value, a power value, an area value and a cost value, which corresponds to the hierarchical table, by using the technology bank, to output an result data as a basis of fabrication of a system.

Abstract: A method of color processing determines whether a pixel color is within at least one range of predetermined colors corresponding to a viewer expected color. If so, the method altering the pixel color to better approximate the viewer expected color. For detection of skin tones determining whether the pixel color is within a range of predetermined colors includes discounting an illuminant of the pixel color. The viewer expected colors are preferably skin tone, grass green and sky blue. The saturation level of grass green and sky blue are enhanced and that of skin tones are suppressed. The saturation s is limited based upon lightness J and hue h to convert to an allowable RGB color format range.

Abstract: A method of color processing determines whether a pixel color is within at least one range of predetermined colors corresponding to a viewer expected color. If so, the method altering the pixel color to better approximate the viewer expected color. For detection of skin tones determining whether the pixel color is within a range of predetermined colors includes discounting an illuminant of the pixel color. The viewer expected colors are preferably skin tone, grass green and sky blue. The saturation level of grass green and sky blue are enhanced and that of skin tones are suppressed. The saturation s is limited based upon lightness J and hue h to convert to an allowable RGB color format range.

Abstract: A method of color processing determines whether a pixel color is within at least one range of predetermined colors corresponding to a viewer expected color. If so, the method altering the pixel color to better approximate the viewer expected color. For detection of skin tones determining whether the pixel color is within a range of predetermined colors includes discounting an illuminant of the pixel color. The viewer expected colors are preferably skin tone, grass green and sky blue. The saturation level of grass green and sky blue are enhanced and that of skin tones are suppressed. The saturation s is limited based upon lightness J and hue h to convert to an allowable RGB color format range.