Patents by Inventor Sherif Sedky
Sherif Sedky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9899725Abstract: Embodiments of a MEMS antenna are presented. Additionally, systems incorporating embodiments of a MEMS antenna are presented. Methods of manufacturing a MEMS antenna are also presented. In one embodiment, the MEMS antenna includes a substrate, a metallic layer disposed over the substrate, the metallic layer forming a ground plane, the ground plane having a region defining a gap disposed therein, a protrusion disposed over the substrate within the region defining the gap, the protrusion extending outwardly from the ground plane, the protrusion having a length and a width, the length being greater than the width, and a first electromagnetic radiator element disposed over the protrusion, the first electromagnetic element having a length and a width, the length being greater than the width.Type: GrantFiled: December 18, 2010Date of Patent: February 20, 2018Assignee: AMERICAN UNIVERSITY IN CAIROInventors: Ezzeldin A. Soliman, Sherif Sedky, Mai O. Sallam, Ahmed Kamal Said Abdel Aziz
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Patent number: 8791021Abstract: Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF6/O2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from ?80 degrees Celsius to ?140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.Type: GrantFiled: March 1, 2012Date of Patent: July 29, 2014Assignee: King Abdullah University of Science and TechnologyInventors: Mohamed Serry, Andrew Rubin, Mohamed Refaat, Sherif Sedky, Mohammad Abdo
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Patent number: 8383441Abstract: Methods for manufacturing micromachined devices and the devices obtained are disclosed. In one embodiment, the method comprises providing a structural layer comprising an amorphous semiconductor material, forming a shielding layer on a first portion of the structural layer and leaving exposed a second portion of the structural layer, and annealing the second portion using a first fluence. The method further comprises removing the shielding layer, and annealing the first portion and the second portion using a second fluence that is less than half the first fluence. In an embodiment, the device comprises a substrate layer, an underlying layer formed on the substrate layer, and a sacrificial layer formed on only a portion of the underlying layer. The device further comprises a structural layer that is in contact with the underlying layer and comprises a first region annealed using a first fluence and a second region annealed using a second fluence.Type: GrantFiled: January 21, 2011Date of Patent: February 26, 2013Assignees: IMEC, American University Cairo, Katholieke UniversiteitInventors: Joumana El Rifai, Ann Witvrouw, Ahmed Abdel Aziz, Sherif Sedky
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Publication number: 20130044037Abstract: Embodiments of a MEMS antenna are presented. Additionally, systems incorporating embodiments of a MEMS antenna are presented. Methods of manufacturing a MEMS antenna are also presented. In one embodiment, the MEMS antenna includes a substrate, a metallic layer disposed over the substrate, the metallic layer forming a ground plane, the ground plane having a region defining a gap disposed therein, a protrusion disposed over the substrate within the region defining the gap, the protrusion extending outwardly from the ground plane, the protrusion having a length and a width, the length being greater than the width, and a first electromagnetic radiator element disposed over the protrusion, the first electromagnetic element having a length and a width, the length being greater than the width.Type: ApplicationFiled: December 18, 2010Publication date: February 21, 2013Applicant: AMERICAN UNIVERSITY IN CAIROInventors: Ezzeldin A. Soliman, Sherif Sedky, Mai O. Sallam, Ahmed Kamal Said Abdel Aziz
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Publication number: 20120225557Abstract: Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF6/O2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from ?80 degrees Celsius to ?140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.Type: ApplicationFiled: March 1, 2012Publication date: September 6, 2012Applicants: THE AMERICAN UNIVERSITY IN CAIRO, KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Mohamed Serry, Andrew Rubin, Mohamed Refaat, Sherif Sedky, Mohammad Abdo
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Publication number: 20110180886Abstract: Methods for manufacturing micromachined devices and the devices obtained are disclosed. In one embodiment, the method comprises providing a structural layer comprising an amorphous semiconductor material, forming a shielding layer on a first portion of the structural layer and leaving exposed a second portion of the structural layer, and annealing the second portion using a first fluence. The method further comprises removing the shielding layer, and annealing the first portion and the second portion using a second fluence that is less than half the first fluence. In an embodiment, the device comprises a substrate layer, an underlying layer formed on the substrate layer, and a sacrificial layer formed on only a portion of the underlying layer. The device further comprises a structural layer that is in contact with the underlying layer and comprises a first region annealed using a first fluence and a second region annealed using a second fluence.Type: ApplicationFiled: January 21, 2011Publication date: July 28, 2011Applicants: IMEC, AMERICAN UNIVERSITY IN CAIRO, KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&DInventors: Joumana El Rifai, Ann Witvrouw, Ahmed Kamal Said Abdel Aziz, Sherif Sedky
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Patent number: 7723606Abstract: A thermoelectric generator (TEG) and a method of fabricating the TEG are described. The TEG is designed so that parasitic thermal resistance of air and height of legs of thermocouples forming a thermopile can be varied and optimized independently. The TEG includes a micromachined thermopile sandwiched in between a hot and a cold plate and at least one spacer in between the thermopile and the hot and/or cold plate. The TEG fabrication includes fabricating the thermopiles, a rim, and the cold plate.Type: GrantFiled: July 1, 2005Date of Patent: May 25, 2010Assignee: IMECInventors: Paolo Fiorini, Vladimir Leonov, Sherif Sedky, Chris Van Hoof, Kris Baert
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Publication number: 20100032812Abstract: A method is provided for controlling the average stress and the strain gradient in structural silicon germanium layers as used in micromachined devices. The method comprises depositing a single silicon germanium layer on a substrate and annealing a predetermined part of the deposited silicon germanium layer. The process parameters of the depositing and/or annealing steps are selected such that a predetermined average stress and a predetermined strain gradient are obtained in the predetermined part of the silicon germanium layer. Preferably a plasma assisted deposition technique is used for depositing the silicon germanium layer, and a pulsed excimer laser is used for local annealing, with a limited thermal penetration depth. Structural silicon germanium layers for surface micromachined structures can be formed at temperatures substantially below 400° C., which offers the possibility of post-processing micromachined structures on top of a substrate comprising electronic circuitry such as CMOS circuitry.Type: ApplicationFiled: December 21, 2006Publication date: February 11, 2010Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC), AMERICAN UNIVERSITY CAIROInventors: Sherif Sedky, Ann Witvrouw
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Patent number: 7320896Abstract: Electronic devices are disclosed that may be used for infrared radiation detection. An example electronic device includes a substrate, a transistor included in the substrate and a silicon-germanium (Si—Ge) structural layer coupled with the transistor. The structural layer has a stress in a predetermined range, where the predetermined range for the stress is selected prior to deposition of the structural layer. Also, the structural layer is deposited on the substrate subsequent to formation of the transistor such that deposition of the structural layer does not substantially adversely affect the operation of the transistor.Type: GrantFiled: May 5, 2006Date of Patent: January 22, 2008Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Patent number: 7176111Abstract: Method and apparatus to obtain as-deposited polycrystalline and low-stress SiGe layers. These layers may be used in Micro Electro-Mechanical Systems (MEMS) devices or micromachined structures. Different parameters are analysed which effect the stress in a polycrystalline layer. The parameters include, without limitation: deposition temperature; concentration of semiconductors (e.g., the concentration of Silicon and Germanium in a SixGe1?x layer, with x being the concentration parameter); concentration of dopants (e.g., the concentration of Boron or Phosphorous); amount of pressure; and use of plasma. Depending on the particular environment in which the polycrystalline SiGe is grown, different values of parameters may be used.Type: GrantFiled: October 3, 2002Date of Patent: February 13, 2007Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Kris Baert, Matty Caymax, Cristina Rusu, Sherif Sedky, Ann Witvrouw
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Publication number: 20060289764Abstract: Electronic devices are disclosed that may be used for infrared radiation detection. An example electronic device includes a substrate, a transistor included in the substrate and a silicon-germanium (Si—Ge) structural layer coupled with the transistor. The structural layer has a stress in a predetermined range, where the predetermined range for the stress is selected prior to deposition of the structural layer. Also, the structural layer is deposited on the substrate subsequent to formation of the transistor such that deposition of the structural layer does not substantially adversely affect the operation of the transistor.Type: ApplicationFiled: May 5, 2006Publication date: December 28, 2006Applicant: Interuniversitair Micro-Elektronica Centrum (IMEC, vzw), a Belgium companyInventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Patent number: 7075081Abstract: A method of controlling an internal stress in a polycrystalline silicon-germanium layer deposited on a substrate. The method includes selecting a deposition pressure that is at or below atmospheric pressure and selecting a deposition temperature that is no greater than 700° C. The deposition pressure and the deposition temperature are selected so as to achieve an internal stress in the silicon-germanium layer that is within a predetermined range.Type: GrantFiled: August 17, 2004Date of Patent: July 11, 2006Assignee: Interuniversitair Microelektronica Centrum (IMEC vzw)Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Patent number: 6884636Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.Type: GrantFiled: May 18, 2001Date of Patent: April 26, 2005Assignee: Interuniversitair Micro-Elektronica Centrum (IMEC,vzw)Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Publication number: 20050012040Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.Type: ApplicationFiled: August 17, 2004Publication date: January 20, 2005Applicant: Interuniversitair Micro-Elektronica Centrum (IMEC,vzw), a Belgium companyInventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Publication number: 20030124761Abstract: Method and apparatus to obtain as-deposited polycrystalline and low-stress SiGe layers. These layers may be used in Micro Electro-Mechanical Systems (MEMS) devices or micromachined structures. Different parameters are analysed which effect the stress in a polycrystalline layer. The parameters include, without limitation: deposition temperature; concentration of semiconductors (e.g., the concentration of Silicon and Germanium in a SixGe1−x layer, with x being the concentration parameter); concentration of dopants (e.g., the concentration of Boron or Phosphorous); amount of pressure; and use of plasma. Depending on the particular environment in which the polycrystalline SiGe is grown, different values of parameters may be used.Type: ApplicationFiled: October 3, 2002Publication date: July 3, 2003Inventors: Kris Baert, Matty Caymax, Cristina Rusu, Sherif Sedky, Ann Witvrouw
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Publication number: 20010055833Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.Type: ApplicationFiled: May 18, 2001Publication date: December 27, 2001Applicant: Interuniversitair Micro-Elektronica Centrum (IMEC, vzw).Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Patent number: 6274462Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.Type: GrantFiled: October 31, 2000Date of Patent: August 14, 2001Assignee: Interuniversitair Micro-Elektronica Centrum (IMEC, vzw)Inventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert
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Patent number: 6194722Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.Type: GrantFiled: March 27, 1998Date of Patent: February 27, 2001Assignee: Interuniversitair Micro-Elektronica Centrum, IMEC, vzwInventors: Paolo Fiorini, Sherif Sedky, Matty Caymax, Christiaan Baert