Abstract: A graphics processor can include a processing cluster array including a plurality of processing clusters coupled with the plurality of memory controllers, each processing cluster of the plurality of processing clusters including a plurality of streaming multiprocessors, the processing cluster array configured for partitioning into a plurality of partitions. The plurality of partitions include a first partition including a first plurality of streaming multiprocessors configured to perform operations for a first neural network, The operations for the first neural network are isolated to the first partition. The plurality of partitions also include a second partition including a second plurality of streaming multiprocessors configured to perform operations for a second neural network. The operations for the second neural network are isolated to the second partition and protected from operations performed for the first neural network.

Abstract: Methods, apparatus, systems and articles of manufacture to generate temporal representations for action recognition systems are disclosed. An example apparatus includes an optical flow computer to compute first optical flows for a video based on computing differences between pairs of frames of the video; an evolution of trajectories (EoT) generator to generate EoT temporal representations of the video based on (a) computing second optical flows of the video and (b) aggregating ones of the second optical flows having different time spans; an action identifier to: identify first actions in the video based on the first optical flows; identify second actions in the video based on the EoT temporal representations; and identify third actions in the video based on frames of the video; and a fuser to determine a fourth action based on a weighted average of the first actions, second actions, and third actions.

Abstract: A graphics processor can include a processing cluster array including a plurality of processing clusters coupled with the plurality of memory controllers, each processing cluster of the plurality of processing clusters including a plurality of streaming multiprocessors, the processing cluster array configured for partitioning into a plurality of partitions. The plurality of partitions include a first partition including a first plurality of streaming multiprocessors configured to perform operations for a first neural network, The operations for the first neural network are isolated to the first partition. The plurality of partitions also include a second partition including a second plurality of streaming multiprocessors configured to perform operations for a second neural network. The operations for the second neural network are isolated to the second partition and protected from operations performed for the first neural network.

Abstract: One embodiment provides a graphics processor comprising a block of execution resources, a cache memory, a cache memory prefetcher, and circuitry including a programmable neural network unit, the programmable neural network unit comprising a network hardware block including circuitry to perform neural network operations and activation operations for a layer of a neural network, the programmable neural network unit addressable by cores within the block of graphics cores and the neural network hardware block configured to perform operations associated with a neural network configured to determine a prefetch pattern for the cache memory prefetcher.

Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.

Abstract: A mechanism is described for facilitating recognition, reidentification, and security in machine learning at autonomous machines. A method of embodiments, as described herein, includes facilitating a camera to detect one or more objects within a physical vicinity, the one or more objects including a person, and the physical vicinity including a house, where detecting includes capturing one or more images of one or more portions of a body of the person. The method may further include extracting body features based on the one or more portions of the body, comparing the extracted body features with feature vectors stored at a database, and building a classification model based on the extracted body features over a period of time to facilitate recognition or reidentification of the person independent of facial recognition of the person.

Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.

Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.

Abstract: A mechanism is described for facilitating recognition, reidentification, and security in machine learning at autonomous machines. A method of embodiments, as described herein, includes facilitating a camera to detect one or more objects within a physical vicinity, the one or more objects including a person, and the physical vicinity including a house, where detecting includes capturing one or more images of one or more portions of a body of the person. The method may further include extracting body features based on the one or more portions of the body, comparing the extracted body features with feature vectors stored at a database, and building a classification model based on the extracted body features over a period of time to facilitate recognition or reidentification of the person independent of facial recognition of the person.

Abstract: Systems, apparatus, articles of manufacture, and methods to generate digitized handwriting with user style adaptations are disclosed. An example apparatus includes at least one memory, and processor circuitry to train a machine learning model to generate a first digitized handwriting sequence based on a stored handwriting sample. To train the machine learning model, the processor circuitry is to cause a parameterization of a first portion of the machine learning model; and cause a reparameterization of a second portion of the machine learning model. The processor circuitry to re-train the trained machine learning model to generate a second digitized handwriting sequence based on a user handwriting sample.

Abstract: A mechanism is described for facilitating person tracking and data security in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting, by a camera associated with one or more trackers, a person within a physical vicinity, where detecting includes capturing one or more images the person. The method may further include tracking, by the one or more trackers, the person based on the one or more images of the person, where tracking includes collect tracking data relating to the person. The method may further include selecting a tracker of the one or more trackers as a preferred tracker based on the tracking data.

Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.

Abstract: Example display power management control circuitry is to determine a baseline image quality parameter associated with a baseline display power mode based on: a baseline first relationship parameter associated with a first relationship between original and boosted pixel values; a baseline percentage of pixels having a color value; and a baseline second relationship parameter associated with a second relationship between the numbers of original pixel values and boosted pixel values; determine a value of a subsequent first relationship parameter based on an adjusted second relationship parameter and a second percentage of pixels having the color value; determine a second image quality parameter associated with the subsequent first relationship parameter, the adjusted second relationship parameter, and the second percentage of pixels; and select the subsequent first relationship parameter and the adjusted second relationship parameter based on comparing the second image quality parameter to the baseline image qua

Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.

Abstract: The present disclosure is directed to systems and methods for reducing display image power consumption while maintaining a consistent, objectively measurable, level of image distortion that comports with a display image quality metric. Raw image data is converted to an HSV format. “V” values are extracted from the HSV format raw image data and a histogram generates a plurality of “V” values. HSV format raw image data is provided to at least one layer of a trained CNN to extract a plurality of features. The plurality of “V” values and the plurality of features are provided to an AI circuit to generate a plurality of distortion class value pairs. Each of the distortion class value pairs is weighted based on proximity of display image distortion and the display image quality metric. The distortion class pair providing a display image distortion close to the display image quality metric is applied to the raw image data to generate the display image data.

Abstract: One embodiment provides for a graphics processor comprising a block of graphics compute units, a graphics processor pipeline coupled to the block of graphics compute units, and a programmable neural network unit including one or more neural network hardware blocks. The programmable neural network unit is coupled with the block of graphics compute units and the graphics processor pipeline. The one or more neural network hardware blocks include hardware to perform neural network operations and activation operations for a layer of a neural network. The programmable neural network unit can configure settings of one or more hardware blocks within the graphics processor pipeline based on a machine learning model trained to optimize performance of a set of workloads.

Abstract: A mechanism is described for facilitating person tracking and data security in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting, by a camera associated with one or more trackers, a person within a physical vicinity, where detecting includes capturing one or more images the person. The method may further include tracking, by the one or more trackers, the person based on the one or more images of the person, where tracking includes collect tracking data relating to the person. The method may further include selecting a tracker of the one or more trackers as a preferred tracker based on the tracking data.

Abstract: The present disclosure is directed to systems and methods for reducing display image power consumption while maintaining a consistent, objectively measurable, level of image distortion that comports with a display image quality metric. Raw image data is converted to an HSV format. “V” values are extracted from the HSV format raw image data and a histogram generates a plurality of “V” values. HSV format raw image data is provided to at least one layer of a trained CNN to extract a plurality of features. The plurality of “V” values and the plurality of features are provided to an AI circuit to generate a plurality of distortion class value pairs. Each of the distortion class value pairs is weighted based on proximity of display image distortion and the display image quality metric. The distortion class pair providing a display image distortion close to the display image quality metric is applied to the raw image data to generate the display image data.

Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.

Abstract: Example display power management control circuitry is to determine a baseline image quality parameter associated with a baseline display power mode based on: a baseline first relationship parameter associated with a first relationship between original and boosted pixel values; a baseline percentage of pixels having a color value; and a baseline second relationship parameter associated with a second relationship between the numbers of original pixel values and boosted pixel values; determine a value of a subsequent first relationship parameter based on an adjusted second relationship parameter and a second percentage of pixels having the color value; determine a second image quality parameter associated with the subsequent first relationship parameter, the adjusted second relationship parameter, and the second percentage of pixels; and select the subsequent first relationship parameter and the adjusted second relationship parameter based on comparing the second image quality parameter to the baseline image qua