Patents by Inventor Sherry Taft

Sherry Taft has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • III-N devices in Si trenches
    Patent number: 10096682
    Abstract: A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: October 9, 2018
    Assignee: Intel Corporation
    Inventors: Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic, Benjamin Chu-Kung, Sherry Taft, Ravi Pillarisetty, Robert S. Chau
  • III-N DEVICES IN SI TRENCHES
    Publication number: 20170207307
    Abstract: A trench comprising a portion of a substrate is formed. A nucleation layer is deposited on the portion of the substrate within the trench. A III-N material layer is deposited on the nucleation layer. The III-N material layer is laterally grown over the trench. A device layer is deposited on the laterally grown III-N material layer. A low defect density region is obtained on the laterally grown material and is used for electronic device fabrication of III-N materials on Si substrates.
    Type: Application
    Filed: March 21, 2017
    Publication date: July 20, 2017
    Inventors: Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic, Benjamin Chu-Kung, Sherry Taft, Ravi Pillarisetty, Robert S. Chau