Patents by Inventor Sherry Wu

Sherry Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250211259
    Abstract: In one aspect, an apparatus includes: a first amplifier coupled to a first node of a receiver signal processing path, the first amplifier to receive and amplify a radio frequency (RF) signal; a first resistive attenuator coupled to the first node, the first resistive attenuator programmable to reduce a level of the RF signal; a second amplifier coupled in parallel with the first amplifier, the second amplifier to receive and amplify the RF signal; and a second attenuator coupled between the first node and the second amplifier, the second attenuator programmable to reduce the level of the RF signal.
    Type: Application
    Filed: December 20, 2023
    Publication date: June 26, 2025
    Inventors: Abdulkerim Coban, Mohamed Elkholy, Rangakrishnan Srinivasan, Sherry Wu, Yu Su
  • Patent number: 12009793
    Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: June 11, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Ruifeng Sun, Sherry Wu, Michael S. Johnson, Vitor Pereira
  • Publication number: 20230208368
    Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 29, 2023
    Inventors: Ruifeng Sun, Sherry Wu, Michael S. Johnson, Vitor Pereira
  • Patent number: 11646705
    Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: May 9, 2023
    Assignee: Silicon Laboratories Inc.
    Inventors: Ruifeng Sun, Sherry Wu, Michael S. Johnson, Vitor Pereira
  • Publication number: 20230006621
    Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Ruifeng Sun, Sherry Wu, Michael S. Johnson, Vitor Pereira
  • Publication number: 20190015307
    Abstract: The present invention is directed to the use of at least one kind of inorganic pigments composed of a spherical composite particle comprising an inorganic UV filter to enhance the sun protection of a cosmetic formulation.
    Type: Application
    Filed: December 8, 2016
    Publication date: January 17, 2019
    Applicant: MERCK PATENT GMBH
    Inventors: Michael TERMER, Frank PFLUECKER, Lilia HEIDER, Alexandra AXT-HEIDEMANN, Jutta ZUR LAGE, Sherry WU
  • Patent number: 6891430
    Abstract: A signal processing integrated circuit has having a chopper stabilized, multistage, feedforward amplifier and a delta sigma analog to digital converter. Filtering of the output of the output from the analog to digital converter comprises a sinc5 filter and a sinc3 filter. The sinc3 filter may be bypassed. A rough buffer permits quick charging of a sample and hold capacitor during part of the charge cycle and slower but more accurate charging during the remainder of the charge cycle.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: May 10, 2005
    Assignee: Cirrus Logic, Inc.
    Inventors: Axel Thomsen, Edwin De Angel, Sherry Wu, Lei Wang, Aryesh Amar
  • Patent number: 6885211
    Abstract: A method of testing an integrated circuit includes setting a guardbanded limit for a parameter associated with an embedded node, a deviation from the guardbanded limit under a set of test conditions correlated with a failure of the integrated circuit across a range of operating conditions. A test is performed under the test conditions to detect deviations of the parameter from the guardbanded limit to detect failures of the integrated circuit over the range of operating conditions.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: April 26, 2005
    Assignee: Cirrus Logic, Inc.
    Inventors: Axel Thomsen, Sherry Wu, Murari Kejariwal, Ammisetti Prasad, John Laurence Melanson
  • Patent number: 6525589
    Abstract: An instrumentation circuit has an integrated circuit that has input terminals, an amplifier arrangement using feed forward compensation and an analog to digital converter and a serial data output receiving the output from said amplifier arrangement. A bridge circuit, having a transducer, or a thermocouple arrangement are connected to input terminals of the integrated circuit.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: February 25, 2003
    Assignee: Cirrus Logic, Inc.
    Inventors: Axel Thomsen, Edwin De Angel, Sherry Wu, Aryesh Amar, Jerome E. Johnston