Patents by Inventor Sheyang NING

Sheyang NING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11037624
    Abstract: Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at least one resistive change element cell in a resistive change element array using an electrical stimulus having a voltage level greater than a steady state voltage level that can be supplied by a power supply.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: June 15, 2021
    Assignee: Nantero, Inc.
    Inventors: Jia Luo, Sheyang Ning, Lee E. Cleveland
  • Patent number: 10825516
    Abstract: Resistive change element cells sharing a selection device and resistive change element arrays including a plurality of resistive change element cells and a plurality of selection devices arranged in a group of at least two resistive change element cells sharing one selection device configuration are disclosed. According to some aspects of the present disclosure a group of resistive change element cells can be arranged on one level above a selection device. According to some aspects of the present disclosure a group of resistive change element cells can be arranged on multiple levels above a selection device.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: November 3, 2020
    Assignee: Nantero, Inc.
    Inventors: Jia Luo, Sheyang Ning, Shiang-Meei Heh
  • Publication number: 20200098429
    Abstract: Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at least one resistive change element cell in a resistive change element array using an electrical stimulus having a voltage level greater than a steady state voltage level that can be supplied by a power supply.
    Type: Application
    Filed: October 11, 2019
    Publication date: March 26, 2020
    Applicant: Nantero, Inc.
    Inventors: Jia Luo, Sheyang Ning, Lee E. Cleveland
  • Patent number: 10446228
    Abstract: Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at least one resistive change element cell in a resistive change element array using an electrical stimulus having a voltage level greater than a steady state voltage level that can be supplied by a power supply.
    Type: Grant
    Filed: December 23, 2017
    Date of Patent: October 15, 2019
    Assignee: Nantero, Inc.
    Inventors: Jia Luo, Sheyang Ning, Lee E. Cleveland
  • Publication number: 20190267081
    Abstract: Resistive change element cells sharing a selection device and resistive change element arrays including a plurality of resistive change element cells and a plurality of selection devices arranged in a group of at least two resistive change element cells sharing one selection device configuration are disclosed. According to some aspects of the present disclosure a group of resistive change element cells can be arranged on one level above a selection device. According to some aspects of the present disclosure a group of resistive change element cells can be arranged on multiple levels above a selection device.
    Type: Application
    Filed: February 27, 2018
    Publication date: August 29, 2019
    Applicant: Nantero, Inc.
    Inventors: Jia Luo, Sheyang Ning, Shiang-Meei Heh
  • Patent number: 10387244
    Abstract: Error correction methods for arrays of resistive change elements are disclosed. An array of resistive change elements is organized into a plurality of subsections. Each subsection includes at least one flag bit and a plurality of data bits. At the start of a write operation, all bits in a subsection are initialized. If any data bits fail to initialize, the pattern of errors is compared to the input data pattern. The flag cells are then activated to indicate the appropriate encoding pattern to apply to the input data to match the errors. The input data is then encoded according to this encoding pattern before being written to the array. A second error correction algorithm can be used to correct remaining errors. During a read operation, the encoding pattern indicated by the flag bits is used to decode the read data and retrieve the original input data.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: August 20, 2019
    Assignee: Nantero, Inc.
    Inventor: Sheyang Ning
  • Publication number: 20190198104
    Abstract: Devices and methods for programming resistive change elements using an electrical stimulus are disclosed. According to some aspects of the present disclosure the devices and methods program at least one resistive change element within at least one resistive change element cell in a resistive change element array using an electrical stimulus having a voltage level greater than a steady state voltage level that can be supplied by a power supply.
    Type: Application
    Filed: December 23, 2017
    Publication date: June 27, 2019
    Applicant: Nantero, Inc.
    Inventors: Jia Luo, Sheyang Ning, Lee E. Cleveland
  • Patent number: 10261861
    Abstract: Error correction methods for arrays of resistive change elements are disclosed. An array of resistive change elements is organized into a plurality of subsections. Each subsection includes at least one flag bit and a plurality of data bits. At the start of a write operation, all bits in a subsection are initialized. If any data bits fail to initialize, the pattern of errors is compared to the input data pattern. The flag cells are then activated to indicate the appropriate encoding pattern to apply to the input data to match the errors. The input data is then encoded according to this encoding pattern before being written to the array. A second error correction algorithm can be used to correct remaining errors. During a read operation, the encoding pattern indicated by the flag bits is used to decode the read data and retrieve the original input data.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: April 16, 2019
    Assignee: Nantero, Inc.
    Inventor: Sheyang Ning
  • Publication number: 20180005706
    Abstract: Error correction methods for arrays of resistive change elements are disclosed. An array of resistive change elements is organized into a plurality of subsections. Each subsection includes at least one flag bit and a plurality of data bits. At the start of a write operation, all bits in a subsection are initialized. If any data bits fail to initialize, the pattern of errors is compared to the input data pattern. The flag cells are then activated to indicate the appropriate encoding pattern to apply to the input data to match the errors. The input data is then encoded according to this encoding pattern before being written to the array. A second error correction algorithm can be used to correct remaining errors. During a read operation, the encoding pattern indicated by the flag bits is used to decode the read data and retrieve the original input data.
    Type: Application
    Filed: June 13, 2017
    Publication date: January 4, 2018
    Inventor: Sheyang NING
  • Publication number: 20180004599
    Abstract: Error correction methods for arrays of resistive change elements are disclosed. An array of resistive change elements is organized into a plurality of subsections. Each subsection includes at least one flag bit and a plurality of data bits. At the start of a write operation, all bits in a subsection are initialized. If any data bits fail to initialize, the pattern of errors is compared to the input data pattern. The flag cells are then activated to indicate the appropriate encoding pattern to apply to the input data to match the errors. The input data is then encoded according to this encoding pattern before being written to the array. A second error correction algorithm can be used to correct remaining errors. During a read operation, the encoding pattern indicated by the flag bits is used to decode the read data and retrieve the original input data.
    Type: Application
    Filed: June 13, 2017
    Publication date: January 4, 2018
    Inventor: Sheyang NING