Patents by Inventor Shiang-Tang Huang

Shiang-Tang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatus for performing statistical static timing analysis
    Patent number: 8645881
    Abstract: A method and an apparatus to perform statistical static timing analysis have been disclosed. In one embodiment, the method includes performing statistical analysis on performance data of a circuit from a plurality of libraries at two or more process corners using a static timing analysis module, and estimating performance of the circuit at a predetermined confidence level based on results of the statistical analysis during an automated design flow of the circuit without using libraries at the predetermined confidence level.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: February 4, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Harish Kriplani, Shiang-Tang Huang
  • Method and an apparatus to perform statistical static timing analysis
    Patent number: 8448104
    Abstract: A method and an apparatus to perform statistical static timing analysis have been disclosed. In one embodiment, the method includes performing statistical analysis on performance data of a circuit from a plurality of libraries at two or more process corners using a static timing analysis module, and estimating performance of the circuit at a predetermined confidence level based on results of the statistical analysis during an automated design flow of the circuit without using libraries at the predetermined confidence level.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: May 21, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Harish Kriplani, Shiang-Tang Huang
  • Systems, methods, and apparatus to perform statistical static timing analysis
    Patent number: 7487475
    Abstract: A method and an apparatus to perform statistical static timing analysis have been disclosed. In one embodiment, the method includes performing statistical analysis on performance data of a circuit from a plurality of libraries at two or more process corners using a static timing analysis module, and estimating performance of the circuit at a predetermined confidence level based on results of the statistical analysis during an automated design flow of the circuit without using libraries at the predetermined confidence level.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: February 3, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Harish Kriplani, Shiang-Tang Huang
  • Dynamic weighting and/or target zone analysis in timing driven placement of cells of an integrated circuit design
    Patent number: 6415426
    Abstract: A novel global placement process and associated computer software are provided for global placement of functional cells of an integrated circuit design. The global placement process is recursive and timing driven. Functional cells are placed according to how that placement is likely to influence signal timing. Also, a novel detailed placement process and associated computer software is provided for detailed placement of functional cells of an integrated circuit design. Target zones are defined which provide indications of the timing impact of functional cell movement. A detailed search for improved cell placements is conducted in which target zones are used to assess the signal timing impact of proposed cell movements. The novel global placement produces a global cell placement result, and the novel detailed placement process produces an improved detailed placement result.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: July 2, 2002
    Assignee: Incentia Design Systems, Inc.
    Inventors: Shing-Chong Chang, Xuequn Xiang, Ihao Chen, Shiang-Tang Huang