Patents by Inventor Shiauhan WU

Shiauhan WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of back-end-of-line (BEOL) fabrication, and devices formed by the method
    Patent number: 9130022
    Abstract: In a method for forming a semiconductor device, an interconnect structure over a semiconductor substrate is provided. The interconnect structure includes a first dielectric layer and a conductive pattern inside a trench in the first dielectric layer. An etch stop layer (ESL) is formed over the interconnect structure. An interface layer comprising elemental silicon is deposited over the ESL. A second dielectric layer is then formed over the interface layer.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: September 8, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shiauhan Wu, Joung-Wei Liou, Han-Ti Hsiaw
  • METHOD OF BACK-END-OF-LINE (BEOL) FABRICATION, AND DEVICES FORMED BY THE METHOD
    Publication number: 20140264870
    Abstract: In a method for forming a semiconductor device, an interconnect structure over a semiconductor substrate is provided. The interconnect structure includes a first dielectric layer and a conductive pattern inside a trench in the first dielectric layer. An etch stop layer (ESL) is formed over the interconnect structure. An interface layer comprising elemental silicon is deposited over the ESL. A second dielectric layer is then formed over the interface layer.
    Type: Application
    Filed: May 9, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shiauhan WU, Joung-Wei LIOU, Han-Ti HSIAW