Abstract: Provided are a molded leadless package, and a sawing type molded leadless package and method of manufacturing same. The molded leadless package includes a lead frame pad having first and second surfaces opposite to each other. A semiconductor chip is adhered to the first surface of the lead frame pad. A lead is electrically coupled to the semiconductor chip. A molding material covers the lead frame pad, the semiconductor chip, and the lead and exposes a portion of the lead and a portion of the second surface of the lead frame pad. A step difference is formed between a surface of the molding material covering the second surface of the lead frame pad and the second surface of the lead frame pad itself. The sawing type molded leadless package includes a short-circuit preventing member that is post-shaped or convex, and protruding from the lower surface of the die pad.

Abstract: A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside. The outer leads include a first outer lead disposed in a central portion of the molded housing, second and third outer leads respectively disposed in a right and left of the first outer lead. The second and third outer leads each have bent portions in portions where they are adjacent to the side surface of the molded housing, the bent portions protruding to increase a space between the first outer lead and the bent portions in the molded housing. At least one of the bent portions of the second and third outer leads is covered by an extended portion of the molded housing.

Abstract: A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside. The outer leads include a first outer lead disposed in a central portion of the molded housing, second and third outer leads respectively disposed in a right and left of the first outer lead. The second and third outer leads each have bent portions in portions where they are adjacent to the side surface of the molded housing, the bent portions protruding to increase a space between the first outer lead and the bent portions in the molded housing. At least one of the bent portions of the second and third outer leads is covered by an extended portion of the molded housing.

Abstract: Provided are a molded leadless package, and a sawing type molded leadless package and method of manufacturing same. The molded leadless package includes a lead frame pad having first and second surfaces opposite to each other. A semiconductor chip is adhered to the first surface of the lead frame pad. A lead is electrically coupled to the semiconductor chip. A molding material covers the lead frame pad, the semiconductor chip, and the lead and exposes a portion of the lead and a portion of the second surface of the lead frame pad. A step difference is formed between a surface of the molding material covering the second surface of the lead frame pad and the second surface of the lead frame pad itself. The sawing type molded leadless package includes a short-circuit preventing member that is post-shaped or convex, and protruding from the lower surface of the die pad.

Abstract: A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing to the outside. The outer leads include a first outer lead disposed in a central portion of the molded housing, second and third outer leads respectively disposed in a right and left of the first outer lead. The second and third outer leads each have bent portions in portions where they are adjacent to the side surface of the molded housing, the bent portions protruding to increase a space between the first outer lead and the bent portions in the molded housing. At least one of the bent portions of the second and third outer leads is covered by an extended portion of the molded housing.

Abstract: A power device having a multi-chip package structure and a manufacturing method therefor are provided. In the power device, a transistor, which is a switching device, and a control integrated circuit (IC) chip, which is a driving device, are mounted together in a package, thereby requiring a high insulation withstand voltage between the transistor chip and the control IC chip. The power device and the manufacturing method can simplify a packaging process by attaching the control IC chip on a chip pad of a lead frame using an insulating adhesive tape at a level with the transistor chip. Furthermore, the overall size of a package in the power device can be reduced by attaching the control IC chip on top of the transistor chip using the insulating adhesive tape. In the case of attaching the control IC chip on the top of the transistor chip, a liquid non-conductive adhesive can be used instead of an insulating adhesive tape.

Abstract: The present invention provides an apparatus for bonding a semiconductor chip to substrate using a non-conductive adhesive tape. The non-conductive adhesive tape may be a polyimide tape. The apparatus may include a tape provider having a reel on which the non-adhesive tape may be spooled, rollers, and a tape cutter which cuts the tape to a suitable size. A tape holder and a tape presser may also be provided to hold the tape in place while the tape cutter cuts the tape. A tape pick-up tool may be provided to transfer the cut tape to a die bonding area on the substrate. The tape holder and the tape pick-up tool may include a suction opening for providing a suction force. The apparatus may further include a die pick up tool for transferring a semiconductor chip from a semiconductor chip provider to the adhesive tape affixed to the substrate.

Abstract: A power semiconductor package is provided. The power semiconductor package includes a chip, leads, conductive media, and a molding material. The leads have a groove in the shape of a hemisphere or a down-set. The package further includes an adhesive. The package can increase solder joint reliability and thermal performance. Also, the size of the package can be reduced, and sawing can be performed so that a burr does not occur.

Abstract: A power device having a multi-chip package structure and a manufacturing method therefor are provided. In the power device, a transistor, which is a switching device, and a control integrated circuit (IC) chip, which is a driving device, are mounted together in a package, thereby requiring a high insulation withstand voltage between the transistor chip and the control IC chip. The power device and the manufacturing method can simplify a packaging process by attaching the control IC chip on a chip pad of a lead frame using an insulating adhesive tape at a level with the transistor chip. Furthermore, the overall size of a package in the power device can be reduced by attaching the control IC chip on top of the transistor chip using the insulating adhesive tape. In the case of attaching the control IC chip on the top of the transistor chip, a liquid non-conductive adhesive can be used instead of an insulating adhesive tape.

Abstract: The present invention provides a semiconductor package including a non-conductive adhesive tape. The use of the non-conductive adhesive tape provides a good electrical insulation between two chips bonded on the same lead frame. The tape has a dielectric strength of 2,500 V or more. Moreover, the use of the tape prevents the defects associated with non-conductive liquid adhesives, such as voids and a delamination between a chip and a lead frame, and thus results in a semiconductor package with a good reliability. The die bonding method using the non-conductive adhesive tape in accordance with the invention is simpler than a conventional die bonding method using a liquid adhesive and insulating film. Therefore, the work time for the die bonding is shortened, and the production cost is reduced.

Abstract: A power semiconductor package is provided. The power semiconductor package includes a chip, leads, conductive media, and a molding material. The leads have a groove in the shape of a hemisphere or a down-set. The package further includes an adhesive. The package can increase solder joint reliability and thermal performance. Also, the size of the package can be reduced, and sawing can be performed so that a burr does not occur.

Abstract: Disclosed is a semiconductor package including: a pad having one power semiconductor device mounted thereon, and a plurality of lead frames including unbent inner frames only, the inner frame being formed on the same line as the pad and electrically connected to the power semiconductor device via a wiring, the lead frames having a first face connected to the wiring, and a second face opposite to the first face. The semiconductor package further includes a molding part formed from an insulating and heat-conductive material and surrounding the power semiconductor device, the pad, and the lead frames. The pad is electrically connected to the power semiconductor device and thereby separated from the lead frames. The lead frames include only inner leads connected to the wiring, and the bottom surface of the lead frames opposite to the top surface connected to the wiring is exposed outwardly together with the bottom surface of the pad, thereby being electrically connected to the printed circuit board via soldering.

Abstract: A semiconductor package has a controlling IC attached to a die pad using an epoxy molding compound (EMC) pad. The EMC pad is formed so as to be slightly larger than the controlling IC. EMC pads are cut from an EMC pad pattern which is formed from a predetermined number of EMC tablets. The EMC pad pattern is molded by heating and pressing the EMC tablets into a wafer shape having a thickness of approximately 0.3 mm and a diameter of approximately 100 mm. Such a thin EMC pad is capable of providing sufficient dielectric strength, and allows for manufacturing of semiconductor packages at lower cost. In addition, conventional equipment can be used to fabricate the semiconductor packages. The packages are flexible, and even a thin package is not easily broken.

Abstract: In a semiconductor package which includes a plurality of semiconductor chips of different kinds, some of the chips are bonded to die bonding pad by means of a conductive adhesive, while the other chips are bonded by means of a non-conductive adhesive that contains highly insulating beads. Encapsulation of the package is by a molding compound. A nitride film or an organic insulating film is disposed on a back side of the chips bonded by the non-conductive adhesive to improve the withstand voltage between these chips and the die pad.