Patents by Inventor Shichao CHENG

Shichao CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11656674
    Abstract: Disclosed are a power consumption reduction circuit for Graphics Processing Units (GPUs) in a server and a server. The power consumption reduction circuit includes a frequency reduction control chip. The frequency reduction control chip, after receiving an overpower alarm signal generated by a Power Supply Unit (PSU), generates a frequency reduction control signal to a Power Break (PWRBRK) pin of each GPU so as to start a frequency reduction operation of each GPU. It can be seen that, in the present application, an underlying hardware circuit is directly used for implementation with relatively quick responses and without intervention of an operating system, whereby the whole frequency reduction operation of the GPU may be completed within 5 ms, and the PSU is prevented from triggering overpower protection within relatively short time. Therefore, loss of service data of a user caused by an exceptional power failure of the server is avoided.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: May 23, 2023
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Peng Wang, Shichao Cheng, Longling Sun, Wenyu Liu, Mingyang Ye
  • Publication number: 20230035371
    Abstract: Disclosed are a power consumption reduction circuit for Graphics Processing Units (GPUs) in a server and a server. The power consumption reduction circuit includes a frequency reduction control chip. The frequency reduction control chip, after receiving an overpower alarm signal generated by a Power Supply Unit (PSU), generates a frequency reduction control signal to a Power Break (PWRBRK) pin of each GPU so as to start a frequency reduction operation of each GPU. It can be seen that, in the present application, an underlying hardware circuit is directly used for implementation with relatively quick responses and without intervention of an operating system, whereby the whole frequency reduction operation of the GPU may be completed within 5 ms, and the PSU is prevented from triggering overpower protection within relatively short time. Therefore, loss of service data of a user caused by an exceptional power failure of the server is avoided.
    Type: Application
    Filed: September 24, 2020
    Publication date: February 2, 2023
    Inventors: Peng WANG, Shichao CHENG, Longling SUN, Wenyu LIU, Mingyang YE
  • Patent number: 10896113
    Abstract: A method for lighting a backplane lamp of multiple NVMe hard disks is provided. The method includes: transmitting a VPP address to the backplane in a cyclic manner by the controller, and analyzing the address transmitted by the controller by a programmable logic device of the backplane after a data stream transmitted by the controller is received; transmitting, by the controller, hard disk lamp lighting information of a corresponding disk position to the programmable logic device of the backplane, if a VPP address analyzed by the backplane is the same as the VPP address transmitted by the controller; and performing logical conversion on the hard disk lamp lighting information, to convert a serial data stream on the VPP signal wires into a parallel signal, lighting a backplane lamp at a corresponding port, and uploading information of a position of the hard disk to the controller.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: January 19, 2021
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Shichao Cheng
  • Publication number: 20200117568
    Abstract: A method for lighting a backplane lamp of multiple NVMe hard disks is provided. The method includes: transmitting a VPP address to the backplane in a cyclic manner by the controller, and analyzing the address transmitted by the controller by a programmable logic device of the backplane after a data stream transmitted by the controller is received; transmitting, by the controller, hard disk lamp lighting information of a corresponding disk position to the programmable logic device of the backplane, if a VPP address analyzed by the backplane is the same as the VPP address transmitted by the controller; and performing logical conversion on the hard disk lamp lighting information, to convert a serial data stream on the VPP signal wires into a parallel signal, lighting a backplane lamp at a corresponding port, and uploading information of a position of the hard disk to the controller.
    Type: Application
    Filed: June 19, 2018
    Publication date: April 16, 2020
    Applicant: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Shichao CHENG