Patents by Inventor Shidong Fu

Shidong Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11538923
    Abstract: A method for etching back a hard mask layer on top of dummy polysilicon gates in a gate last process comprises: step 1: forming a plurality of dummy gate structures; step 2: depositing a spin-on carbon (SOC) layer to fill the space regions between the sidewalls of the dummy gate structures to a level above the top surface of each of the plurality of dummy gate structures; step 3: performing a first etching-back to the spin-on carbon layer to remove the SOC layer outside the space regions and keep the SOC layer in the space regions below the top surfaces of each of dummy polysilicon gate; step 4: performing a second etching-back by using the remaining spin-on carbon layer as a mask to remove the hard mask layer and the sidewalls of the dummy polysilicon gates on both sides of the hard mask layer at the same time; step 5: removing the SOC layer. This technique saves one photomask and improves the process window.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: December 27, 2022
    Assignee: SHANGHAI HUALI INTEGRATED CIRCUIT CORPORATION
    Inventors: Shidong Fu, Ran Huang, Bohan Jiang, Ying Xu
  • Publication number: 20220102531
    Abstract: A method for etching back a hard mask layer on top of dummy polysilicon gates in a gate last process comprises: step 1: forming a plurality of dummy gate structures; step 2: depositing a spin-on carbon (SOC) layer to fill the space regions between the sidewalls of the dummy gate structures to a level above the top surface of each of the plurality of dummy gate structures; step 3: performing a first etching-back to the spin-on carbon layer to remove the SOC layer outside the space regions and keep the SOC layer in the space regions below the top surfaces of each of dummy polysilicon gate; step 4: performing a second etching-back by using the remaining spin-on carbon layer as a mask to remove the hard mask layer and the sidewalls of the dummy polysilicon gates on both sides of the hard mask layer at the same time; step 5: removing the SOC layer. This technique saves one photomask and improves the process window.
    Type: Application
    Filed: April 28, 2021
    Publication date: March 31, 2022
    Inventors: Shidong Fu, Ran Huang, Bohan Jiang, Ying Xu