Abstract: An emulator system capable of solving a problem of a conventional emulator system in that it requires a gate array for executing a port function of a peripheral emulation chip because external pins of the peripheral emulation chip cannot achieve the port function required in a peripheral emulation mode. The present emulator system has at least two peripheral emulation chips. Each peripheral emulation chip includes a core block for controlling buses, a peripheral function block for achieving functions of a peripheral device, a mode setting circuit for setting a normal mode enabling the core block or the peripheral emulation mode enabling the peripheral function block, external pins, and a link switching circuit for selecting one of the connections of the external pins with the buses and with the peripheral function block.

Abstract: A memory driving apparatus comprises instruction means and which instruction means instructs whether a reference voltage generating portion should be activated at all times or it should be activated only when data is read out.

Abstract: A multiplexed text data sampling circuit comprises a detecting signal inhibiting circuit (3) for inhibiting delivery of a detecting signal indicating a detection of a start bit of text broadcasting data from a start bit detecting circuit (2) during a predetermined period of time before the start bit appears, and a variable divider (71), responsive to the detecting signal, for dividing a clock signal so as to produce a sampling clock signal to sample the text broadcasting data, and for varying a dividing ratio between the frequency of the clock signal and the frequency of the sampling clock signal in such a manner that the sampling timing for each of bits of the text broadcasting except one or more last bits is adjusted so that each bit except the one or more last bits is sampled in the middle of a period of time during which each bit except the one or more last bits is applied to the sampling circuit, and the sampling timing for each of the one or more last bits is adjusted so that each bit of the one or more

Abstract: In a control system for a screen display for displaying characters or patterns on a display by reading font data from storage means for storing font data for characters, symbols and the like according to outside data, and capable of scrolling these display contents over a scroll section having a fixed width in both vertical and horizontal directions, to display the display contents in such a way that they appear or disappear from a predetermined position, output to the display is inhibited in a predetermined section on one side of the scroll section by an display control data output inhibition circuit.

Abstract: A circuit for reducing the number of times a character read-only memory (ROM) in a video display must be accessed in order to display outlined characters. For each pixel on a scan line in a character to be displayed the circuit outputs information on the current scan line and the scan lines above and below the current scan line. The pixels above and below the current pixel on the current scan line are summed and output as a single value. Thus, the number of accesses to the character ROM is reduced from three to two.