Patents by Inventor Shigeaki Ide

Shigeaki Ide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090234482
    Abstract: When inputted with a loading plan table file including item names to be loaded into a process line and the number of item names to be loaded, an equipment loop is executed for each equipment. The equipment loop includes an item name loop and a machine-type loop. In the item name loop, a condition group representing a combination of machine types is acquired for each process. In the machine-type loop, distribution factor data for each machine type is acquired for each condition group, and data of a required number of pieces to be processed by process and machine type, the data to be assigned to each machine type on the basis of the distribution factor data. Based on this data of the number of pieces to be processed by process and machine type, machine-type load factor data for each machine type is determined for each equipment.
    Type: Application
    Filed: February 10, 2009
    Publication date: September 17, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Shigeaki Ide
  • Publication number: 20080255599
    Abstract: An acupuncture needle gives skin a favorable stimulus without invading the skin when in contact with or pressed against the skin. The acupuncture needle includes a base plate and projections formed on a surface of the base plate integrally therewith. Each of the projections have elasticity and includes a base portion and a substantially cylindrical head portion formed on the base portion. The head portion has a flat top surface substantially parallel to the surface of the base plate and a side perpendicular to the surface f the base plate. The base portion has an inwardly depressed external curved line in a central vertical section and a diameter in a transverse cross section gradually becoming larger toward the surface of the base plate. The projections sway in a direction substantially parallel to the skin when the acupuncture needle is in contact with or pressed against the skin.
    Type: Application
    Filed: March 21, 2008
    Publication date: October 16, 2008
    Applicant: TOYO RESIN Corporation
    Inventors: Shigeaki IDE, Tomoya Hasegawa, Satoshi Fukasawa, Hiroaki Nanba
  • Publication number: 20080010109
    Abstract: The system includes: an operation management server 20 and a lot history server 30, which collect operation status data showing operation statuses of a plurality of equipments 10; an OEE measuring PC 40 accumulating an actual processing time and a loss time from the operation status data of the plurality of equipments 10 on a predetermined period basis, and calculating overall equipment efficiencies for each predetermined period from the obtained accumulated-results; an equipment load factor calculating PC 50 accepting information on an improvement plan for the equipment, predicting a future overall equipment efficiency for each equipment according to the overall equipment efficiency and the information on the improvement plan, calculating the future group load factor based on the predicted future overall equipment efficiency; and a WEB server 60 storing equipment management information including the future overall equipment efficiency and the future equipment load factor for a plurality of equipments.
    Type: Application
    Filed: July 2, 2007
    Publication date: January 10, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Shigeaki Ide
  • Patent number: 6638141
    Abstract: A polishing apparatus for CMP is provided. Heating means heats the substrate held by the holder. Temperature detecting means detects temperature of the heating means. Temperature compensating means sets temperature compensation values in such a way that a polishing rate is approximately uniform over a whole polishing surface of a polishing film. The polishing film is formed on the substrate. The heating means is controlled in such a way that the temperature detected by the temperature detecting means corresponds to the temperature compensation values. The substrate is heated by the heating means while controlling the heating means with the controller within a polishing period of the film. The heating means may comprise heaters arranged to cover the substrate and controlled by a controller.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: October 28, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Shigeaki Ide
  • Patent number: 6536455
    Abstract: A cleaning system for a reaction chamber having jigs and top and bottom openings includes a cleaning solution supplier under the top opening for spraying a cleaning solution within the reaction chamber to supply the cleaning solution onto an inner wall of the reaction chamber and surfaces of the jigs, and a sloped bottom plate that closes the bottom opening so that the cleaning solution falls onto the sloped bottom plate and flows across the sloped bottom plate to a drain.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: March 25, 2003
    Assignee: NEC Corporation
    Inventor: Shigeaki Ide
  • Patent number: 6506256
    Abstract: The present invention provides an apparatus for diffusing an impurity into a semiconductor wafer comprising: a diffusion furnace tubs which has a longitudinal center axis extending along a vertical direction and the diffusion tube having at least a gas injector vertically extending in a vicinity of an inner wall of the diffusion furnace tube and the gas injector having a single vertical alignment of a plurality of gas injection nozzles for blowing an impurity gas toward the longitudinal center axis in a first horizontal direction; and a wafer holder for holding at least one semiconductor wafer, the wafer holder being provided in the diffusion furnace tube so that the wafer holder rotates around a rotational axis extending along the vertical axis, whereby the at least one semiconductor wafer rotates around the rotational axis so as to keep a normal of the at least one semiconductor wafer directed in a diametrically outward direction from the rotational center axis.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: January 14, 2003
    Assignee: NEC Corporation
    Inventor: Shigeaki Ide
  • Publication number: 20030008600
    Abstract: A polishing apparatus for CMP is provided. Heating means heats the substrate held by the holder. Temperature detecting means detects temperature of the heating means. Temperature compensating means sets temperature compensation values in such a way that a polishing rate is approximately uniform over a whole polishing surface of a polishing film. The polishing film is formed on the substrate. The heating means is controlled in such a way that the temperature detected by the temperature detecting means corresponds to the temperature compensation values. The substrate is heated by the heating means while controlling the heating means with the controller within a polishing period of the film. The heating means may comprise heaters arranged to cover the substrate and controlled by a controller.
    Type: Application
    Filed: July 5, 2002
    Publication date: January 9, 2003
    Inventor: Shigeaki Ide
  • Publication number: 20020042190
    Abstract: The present invention provides an apparatus for diffusing an impurity into a semiconductor wafer comprising: a diffusion furnace tube which has a longitudinal center axis extending along a vertical direction and the diffusion tube having at least a gas injector vertically extending in a vicinity of an inner wall of the diffusion furnace tube and the gas injector having a single vertical alignment of a plurality of gas injection nozzles for blowing an impurity gas toward the longitudinal center axis in a first horizontal direction; and a wafer holder for holding at least one semiconductor wafer, the wafer holder being provided in the diffusion furnace tube so that the wafer holder rotates around a rotational axis extending along the vertical axis, whereby the at least one semiconductor wafer rotates around the rotational axis so as to keep a normal of the at least one semiconductor wafer directed in a diametrically outward direction from the rotational center axis.
    Type: Application
    Filed: December 5, 2001
    Publication date: April 11, 2002
    Applicant: NEC Corporation
    Inventor: Shigeaki Ide
  • Patent number: 6348397
    Abstract: The present invention provides an apparatus for diffusing an impurity into a semiconductor wafer comprising: a diffusion furnace tube which has a longitudinal center axis extending along a vertical direction and the diffusion tube having at least a gas injector vertically extending in a vicinity of an inner wall of the diffusion furnace tube and the gas injector having a single vertical alignment of a plurality of gas injection nozzles for blowing an impurity gas toward the longitudinal center axis in a first horizontal direction; and a wafer holder for holding at least one semiconductor wafer, the wafer holder being provided in the diffusion furnace tube so that the wafer holder rotates around a rotational axis extending along the vertical axis, whereby the at least one semiconductor wafer rotates around the rotational axis so as to keep a normal of the at least one semiconductor wafer directed in a diametrically outward direction from the rotational center axis.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: February 19, 2002
    Assignee: NEC Corporation
    Inventor: Shigeaki Ide
  • Publication number: 20010055865
    Abstract: The present invention provides an apparatus for diffusing an impurity into a semiconductor wafer comprising: a diffusion furnace tube which has a longitudinal center axis extending along a vertical direction and the diffusion tube having at least a gas injector vertically extending in a vicinity of an inner wall of the diffusion furnace tube and the gas injector having a single vertical alignment of a plurality of gas injection nozzles for blowing an impurity gas toward the longitudinal center axis in a first horizontal direction; and a wafer holder for holding at least one semiconductor wafer, the wafer holder being provided in the diffusion furnace tube so that the wafer holder rotates around a rotational axis extending along the vertical axis, whereby the at least one semiconductor wafer rotates around the rotational axis so as to keep a normal of the at least one semiconductor wafer directed in a diametrically outward direction from the rotational center axis.
    Type: Application
    Filed: February 1, 1999
    Publication date: December 27, 2001
    Inventor: SHIGEAKI IDE
  • Patent number: 6316748
    Abstract: An apparatus for manufacturing semiconductor devices includes a main chamber with a main heater for heating the main chamber and a single preliminary chamber, which is cylindrically shaped and is provided under the main chamber. The preliminary chamber is separated by a shutter from the main chamber and has a preliminary heater for heating the preliminary chamber. The preliminary chamber has at least a pair of doors.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: November 13, 2001
    Assignee: NEC Corporation
    Inventor: Shigeaki Ide
  • Patent number: 6241822
    Abstract: A vertical heat treatment apparatus for forming oxide films on a plurality of semiconductor wafers. The apparatus comprises: a reaction tube which inclines from the vertical direction toward the horizontal direction by a predetermined angle; and a wafer supporting means which supports a plurality of semiconductor wafers inside the reaction tube such that the wafers are disposed parallel to each other while keeping a gap between adjacent upper and lower wafers and having an offset portion between adjacent upper and lower wafers. The plurality of semiconductor wafers disposed inside said reaction tube are heated and a predetermined gas is introduced into the reaction tube, thereby oxide films are formed on the plurality of semiconductor wafers.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: June 5, 2001
    Assignee: NEC Corporation
    Inventor: Shigeaki Ide
  • Patent number: 6004304
    Abstract: The present invention relates to a subcutaneous needle in which a needle body and an adhesive tape are reliably secured together with a resin material enabling the operation to be correctly executed, and a method of producing the same. The subcutaneous needle is constituted by an adhesive tape, a separate paper, a needle body and a resin material. The adhesive tape has a hole formed in the central portion and has an adhesive surface on one side thereof. The separate paper has a hole in the central portion and is stuck on the adhesive surface of the adhesive tape. The needle body is bent in an L-shape and its top end side protrudes penetrating through the holes of the adhesive tape and of the separate paper. The base end side of the needle body is arranged nearly in parallel with a nonadhesive surface of the adhesive tape. The resin material is injection-molded onto the nonadhesive surface of the adhesive tape so as to cover and secure the base end side of the needle body.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: December 21, 1999
    Assignee: Seirin Kasei Co., Ltd.
    Inventors: Tsuyoshi Suzuki, Shigeaki Ide, Masatoshi Yamamoto
  • Patent number: 5603772
    Abstract: A furnace available for diffusion and oxidation is equipped with a plurality of groups of temperature sensors monitoring respective zones heated by associated heater elements, and a plurality of controller vary electric currents supplied to the heater elements so as to create a uniform temperature distribution around semiconductor wafers.
    Type: Grant
    Filed: August 11, 1995
    Date of Patent: February 18, 1997
    Assignee: NEC Corporation
    Inventor: Shigeaki Ide
  • Patent number: 5013692
    Abstract: A process for preparing an insulating film for semiconductor memory device which comprises forming a silicon nitride film over a substrate by a CVD technique, oxidizing the surface of the silicon nitride film to form a silicon oxide layer over the film, and removing the silicon oxide layer by etching to form an improved silicon nitride film, which is suitably used for the formation of a capacitor of highly integrated memory device.
    Type: Grant
    Filed: December 5, 1989
    Date of Patent: May 7, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigeaki Ide, Ichiroh Oki