Patents by Inventor Shigeaki Okawa
Shigeaki Okawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8552469Abstract: There is a problem that a reverse off-leak current becomes too large in a Schottky barrier diode. A semiconductor device of the present invention includes P-type first and second anode diffusion layers formed in an N-type epitaxial layer, N-type cathode diffusion layers formed in the epitaxial layer, a P-type third anode diffusion layer formed in the epitaxial layer so as to surround the first and second anode diffusion layers and to extend toward the cathode diffusion layers, and a Schottky barrier metal layer formed on the first and second anode diffusion layers.Type: GrantFiled: September 27, 2007Date of Patent: October 8, 2013Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLCInventors: Shuichi Kikuchi, Shigeaki Okawa, Kiyofumi Nakaya, Shuji Tanaka
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Patent number: 7999333Abstract: In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.Type: GrantFiled: March 27, 2006Date of Patent: August 16, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Shuichi Kikuch, Shigeaki Okawa, Kiyofumi Nakaya, Toshiyuki Takahashi
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Patent number: 7741694Abstract: A semiconductor integrated circuit device according to the present invention includes an N-type embedded diffusion region between a substrate and an epitaxial layer in first and second island regions serving as small signal section. The N-type embedded diffusion region connects to N-type diffusion regions having supply potential. The substrate and the epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.Type: GrantFiled: September 27, 2004Date of Patent: June 22, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Ryo Kanda, Shigeaki Okawa, Kazuhiro Yoshitake
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Patent number: 7737523Abstract: In a semiconductor device of the present invention, a protection diode for protecting a device is formed on an epitaxial layer formed on a substrate. A Schottky barrier metal layer is formed on a surface of the epitaxial layer and a P-type diffusion layer is formed at a lower portion of an end portion of the Schottky barrier metal layer. Then, a P-type diffusion layer is formed to be connected to a P-type diffusion layer and is extended to a cathode region. A metal layer to which an anode electrode is applied is formed above the P-type diffusion layer, thereby making it possible to obtain a field plate effect. This structure reduces a large change in a curvature of a depletion layer, thereby improving a withstand voltage characteristic of the protection diode.Type: GrantFiled: March 30, 2006Date of Patent: June 15, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Shuichi Kikuchi, Shigeaki Okawa, Kiyofumi Nakaya, Toshiyuki Takahashi
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Patent number: 7652307Abstract: In a semiconductor device of the present invention, a MOS transistor is disposed in an elliptical shape. Linear regions in the elliptical shape are respectively used as the active regions, and round regions in the elliptical shape is used respectively as the inactive regions. In each of the inactive regions, a P type diffusion layer is formed to coincide with a round shape. Another P type diffusion layer is formed in a part of one of the inactive regions. These P type diffusion layers are formed as floating diffusion layers, are capacitively coupled to a metal layer on an insulating layer, and assume a state where predetermined potentials are respectively applied thereto. This structure makes it possible to maintain current performance of the active regions, while improving the withstand voltage characteristics in the inactive regions.Type: GrantFiled: September 7, 2006Date of Patent: January 26, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Shuichi Kikuchi, Kiyofumi Nakaya, Shigeaki Okawa
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Publication number: 20080164556Abstract: There is a problem that a reverse off-leak current becomes too large in a Schottky barrier diode. A semiconductor device of the present invention includes P-type first and second anode diffusion layers formed in an N-type epitaxial layer, N-type cathode diffusion layers formed in the epitaxial layer, a P-type third anode diffusion layer formed in the epitaxial layer so as to surround the first and second anode diffusion layers and to extend toward the cathode diffusion layers, and a Schottky barrier metal layer formed on the first and second anode diffusion layers.Type: ApplicationFiled: September 27, 2007Publication date: July 10, 2008Inventors: Shuichi Kikuchi, Shigeaki Okawa, Kiyofumi Nakaya, Shuji Tanaka
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Patent number: 7381998Abstract: A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to each other; the cathode region of the diode and the collector region of a power NPN transistor are electrically connected to each other. Accordingly, the dividing region in the first island region having a horizontal PNP transistor becomes lower in potential than the dividing regions in the other island regions, so that the inflow of free carriers (electrons) to the horizontal PNP transistor can be prevented.Type: GrantFiled: September 24, 2004Date of Patent: June 3, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Ryo Kanda, Shigeaki Okawa, Kazuhiro Yoshitake
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Publication number: 20080079110Abstract: There is a problem that a reverse off-leak current becomes too large in a Schottky barrier diode. A semiconductor device of the present invention includes a P-type first anode diffusion layer formed in an N-type epitaxial layer, a second anode diffusion layer which is formed so as to surround the first anode diffusion layer, and which has an impurity concentration lower than that of the first anode diffusion layer, N-type cathode diffusion layers formed in the epitaxial layer, and a Schottky barrier metal layer formed on the first and second anode diffusion layers.Type: ApplicationFiled: September 27, 2007Publication date: April 3, 2008Inventors: Shuichi KIKUCHI, Shigeaki OKAWA, Kiyofumi NAKAYA, Shuji TANAKA
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Publication number: 20070057321Abstract: In a semiconductor device of the present invention, a MOS transistor is disposed in an elliptical shape. Linear regions in the elliptical shape are respectively used as the active regions, and round regions in the elliptical shape is used respectively as the inactive regions. In each of the inactive regions, a P type diffusion layer is formed to coincide with a round shape. Another P type diffusion layer is formed in a part of one of the inactive regions. These P type diffusion layers are formed as floating diffusion layers, are capacitively coupled to a metal layer on an insulating layer, and assume a state where predetermined potentials are respectively applied thereto. This structure makes it possible to maintain current performance of the active regions, while improving the withstand voltage characteristics in the inactive regions.Type: ApplicationFiled: September 7, 2006Publication date: March 15, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Shuichi Kikuchi, Kiyofumi Nakaya, Shigeaki Okawa
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Publication number: 20060244091Abstract: In a semiconductor device of the present invention, a protection diode for protecting a device is formed on an epitaxial layer formed on a substrate. A Schottky barrier metal layer is formed on a surface of the epitaxial layer and a P-type diffusion layer is formed at a lower portion of an end portion of the Schottky barrier metal layer. Then, P-type diffusion layers are formed in a floating state closer to a cathode region side than the P-type diffusion layer, and are capacitively coupled with a metal layer to which an anode potential is applied. This structure reduces a large change in a curvature of a depletion layer, thereby improving a withstand voltage characteristic of the protection diode.Type: ApplicationFiled: March 30, 2006Publication date: November 2, 2006Inventors: Shuichi Kikuchi, Shigeaki Okawa, Kiyofumi Nakaya, Toshiyuki Takahashi
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Publication number: 20060220099Abstract: In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.Type: ApplicationFiled: March 27, 2006Publication date: October 5, 2006Inventors: Shuichi Kikuchi, Shigeaki Okawa, Kiyofumi Nakaya, Toshiyuki Takahashi
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Publication number: 20060220166Abstract: In a semiconductor device of the present invention, a protection diode for protecting a device is formed on an epitaxial layer formed on a substrate. A Schottky barrier metal layer is formed on a surface of the epitaxial layer and a P-type diffusion layer is formed at a lower portion of an end portion of the Schottky barrier metal layer. Then, a P-type diffusion layer is formed to be connected to a P-type diffusion layer and is extended to a cathode region. A metal layer to which an anode electrode is applied is formed above the P-type diffusion layer, thereby making it possible to obtain a field plate effect. This structure reduces a large change in a curvature of a depletion layer, thereby improving a withstand voltage characteristic of the protection diode.Type: ApplicationFiled: March 30, 2006Publication date: October 5, 2006Inventors: Shuichi Kikuchi, Shigeaki Okawa, Kiyofumi Nakaya, Toshiyuki Takahashi
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Patent number: 7067899Abstract: A semiconductor integrated circuit device according to the invention includes an N-type embedded diffusion region between a substrate and a first epitaxial layer in island regions serving as small signal section. The substrate and the first epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.Type: GrantFiled: September 27, 2004Date of Patent: June 27, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Ryo Kanda, Shigeaki Okawa, Kazuhiro Yoshitake
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Patent number: 6960797Abstract: The object of the present invention is to provide a semiconductor device, which is suitable for use to connect electric condenser microphones. A semiconductor device, comprises: a conductivity-type substrate; an epitaxial layer formed on top of the substrate; island regions separating the epitaxial layer; an input transistor formed on one of the island regions; an insulation layer covering the surface of the input transistor layer; an expansion electrode formed above the insulation layer so as to provide an electrical connection to an input terminal of the input transistor; and resistivity of the epitaxial layer formed below the expansion electrode being in a range of 1000˜5,000 ?·cm.Type: GrantFiled: December 17, 2002Date of Patent: November 1, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Shigeaki Okawa, Toshiyuki Ohkoda
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Publication number: 20050087771Abstract: A semiconductor integrated circuit device according to the present invention includes a diode in a second island region. The anode region of the diode and the dividing region in a first island region having a horizontal PNP transistor are electrically connected to each other; the cathode region of the diode and the collector region of a power NPN transistor are electrically connected to each other. Accordingly, the dividing region in the first island region having a horizontal PNP transistor becomes lower in potential than the dividing regions in the other island regions, so that the inflow of free carriers (electrons) to the horizontal PNP transistor can be prevented.Type: ApplicationFiled: September 24, 2004Publication date: April 28, 2005Inventors: Ryo Kanda, Shigeaki Okawa, Kazuhiro Yoshitake
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Publication number: 20050082632Abstract: A semiconductor integrated circuit device according to the present invention includes an N-type embedded diffusion region between a substrate and an epitaxial layer in first and second island regions serving as small signal section. The N-type embedded diffusion region connects to N-type diffusion regions having supply potential. The substrate and the epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.Type: ApplicationFiled: September 27, 2004Publication date: April 21, 2005Inventors: Ryo Kanda, Shigeaki Okawa, Kazuhiro Yoshitaka
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Publication number: 20050077571Abstract: A semiconductor integrated circuit device according to the invention includes an N-type embedded diffusion region between a substrate and a first epitaxial layer in island regions serving as small signal section. The substrate and the first epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.Type: ApplicationFiled: September 27, 2004Publication date: April 14, 2005Inventors: Ryo Kanda, Shigeaki Okawa, Kazuhiro Yoshitake
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Patent number: 6815799Abstract: A semiconductor integrated circuit device with built-in spark killer diodes suitable for output transistor protection has a problem such that a leakage current to the substrate is great and a desirable forward current cannot be obtained. In a semiconductor integrated circuit device of the present invention, P+-type first and second diffusion regions 34 and 32 are formed on the surface of a second epitaxial layer 23 in a partly overlapping manner. And, by a connection to an anode electrode 39 at a part immediately over the P+-type second diffusion region 32, a parasitic resistance R1 is made greater than a parasitic resistance R2. Thus, an operation of a parasitic transistor TR2 that causes a leakage current to a substrate 21 is suppressed, whereby leakage current can be greatly reduced.Type: GrantFiled: May 14, 2003Date of Patent: November 9, 2004Assignee: Sanyo Electric Co., Ltd.Inventors: Shigeaki Okawa, Koichiro Ogino
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Publication number: 20040026717Abstract: A semiconductor integrated circuit device with built-in spark killer diodes suitable for output transistor protection has a problem such that a leakage current to the substrate is great and a desirable forward current cannot be obtained. In a semiconductor integrated circuit device of the present invention, P+-type first and second diffusion regions 34 and 32 are formed on the surface of a second epitaxial layer 23 in a partly overlapping manner. And, by a connection to an anode electrode 39 at a part immediately over the P+-type second diffusion region 32, a parasitic resistance R1 is made greater than a parasitic resistance R2. Thus, an operation of a parasitic transistor TR2 that causes a leakage current to a substrate 21 is suppressed, whereby leakage current can be greatly reduced.Type: ApplicationFiled: May 14, 2003Publication date: February 12, 2004Inventors: Shigeaki Okawa, Koichiro Ogino
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Patent number: 6590273Abstract: In the semiconductor integrated circuit device, a first P+ type buried layer formed as an anode region and an N+ type diffused region formed in a cathode region are spaced from each other in the direction of the depth. This makes it possible to provide a semiconductor integrated circuit device in which a large depletion layer forming region can be provided in an N type region at a PN junction formed by first and second epitaxial layers and when a reverse bias voltage is applied to a diode element and in which a withstand voltage can be maintained by a depletion layer thus formed to prevent breakdown of elements in the device attributable to a breakdown current.Type: GrantFiled: December 21, 2001Date of Patent: July 8, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Shigeaki Okawa, Toshiyuki Ohkoda